Preparation method of tunnelling oxidized layer in imbedded type quick flash storage

A technology for tunneling oxide layer and memory, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of tunnel oxide layer thickness limitation, affecting device reliability, unrealistic process technology, etc.
CN1225772CInactive Publication Date: 2005-11-02INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
Publication Date
2005-11-02
Estimated Expiration
Not applicable · inactive patent

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Abstract

A process for preparing the tunnelling oxidized layer in embedded flash memory includes such steps as washing the silicon chip, using dry etching machine to fluorinate it, conventional washing, washing it in the solution of isopropanol for 1 min, and high-temp oxidizing.
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Description

technical field

[0001] The invention belongs to the field of semiconductor devices, and relates to a method for preparing a tunnel oxide layer in an embedded flash memory suitable for SOC (System On A Chip) applications. Background technique

[0002] With the development of semiconductor integrated circuit technology, the feature size of the device is continuously reduced, and the operating voltage and power consumption of the device are continuously reduced. In the stacked gate flash memory, as the feature size of the device is reduced or a new device structure , the source-drain operating voltage can be effectively reduced, while the gate voltage strongly depends on the capacitive coupling ratio of the control gate and the floating gate, the thickness of the tunnel oxide layer, the barrier height of the tunnel oxide layer, and the stress-induced leakage current (Stress Induced LeakageCurrent, SILC) and abnormal leakage current (Anomalous Leakage Current). In general flash...

Claims

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