Spread spectrum phase locking circuit with adjustable spread spectrum range

Abstract

A spread spectrum phase-locked loop includes a reference time pulse generator, a phase frequenct detector, a charge pump, a loop filter, a voltage variable module, a time sequence generation controller, a first and second voltage-controlled oscillators, the time sequence generation controller outputs periodical variance FM / AM control signal, and voltage variable module receives the voltage signal of loop filter, outputs the first voltage signal and outputs a second voltage signal according to the control signal of time sequence generation controller. The first voltage control oscillator receives the first voltage signal of the voltage variable module and outputs the feedback time sequence signal to phase frequency detector and the second receives the second voltage signal to output needed spread spectrum signal.

Description

technical field [0001] The invention relates to a spread frequency phase locked loop, in particular to a spread frequency phase locked loop with adjustable spread frequency range. Background technique [0002] In recent years, the problem of Electro-Magnetic Interference (EMI) has been paid more and more attention. The clock generator on the computer motherboard is often the main source of electromagnetic interference in the computer host. Therefore, in order to enable a general phase lock loop (PLL) to have the function of suppressing electromagnetic interference, some changes are usually made to the phase lock loop to enable it to have a spread spectrum function, so as to suppress electromagnetic interference. [0003] Figure 1A A main block diagram of a conventional phase-locked loop is shown. The PLL 100 includes a divide-N counter 102 , a divide-M counter 104 , a phase frequency detector 106 , a charge pump 108 , a loop filter 110 and a voltage-controlled oscillator ...

AI Technical Summary

Problems solved by technology

However, the disadvantage of this method is that the frequency spread may not be uniform, that is, when the frequency reaches the upper and lower limits, there will be a period of time when the frequency is fixed, resulting in the output clock signal at f 1 with f 2 The frequency of the frequency has a protrusion phenomenon, as shown in Figure 3(A) and Figure 3(B)

The protrusion phenomenon may exceed the EMI specification

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