Clock generating circuit, integrated circuit storage devices and method for using said devices

Abstract

Clock generation circuits for an integrated circuit device are provided including a temperature sensor circuit, the temperatures sensor circuit including a calibration circuit responsive to a temperature coding signal and a temperature sensor. The temperature sensor circuit has a first or test mode state in which a temperature output signal of the temperature sensor circuit is based on a temperature sensor output control signal and a second or normal operating mode state in which the temperature output signal is based on the temperature sensor and the calibration circuit. A clock period controller circuit includes a calibration circuit responsive to a period coding signal. The clock period controller circuit generates a period control signal based on the temperature output signal and the calibration circuit of the clock period controller circuit. A clock generator circuit generates a clock signal based on the period control signal. Integrated circuit memory devices and methods for controlling the refresh period of the memory devices are also provided.

Description

[0001] This application claims priority from Korean Patent Application No. 2001-30522 filed on May 31, 2001, which is hereby incorporated by reference. technical field [0002] The present invention relates to integrated circuit devices, and more particularly, to integrated circuit devices having period-selectable clocks, and methods of using such integrated circuit devices. Background technique [0003] The storage of data in integrated circuit memory devices is well known, including memory devices that store data as electrical charges in capacitors. Such memory devices typically refresh stored data when, for some reason, charge may be lost, for example, due to leakage current from a capacitor. One known method is called a refresh operation, which completely erases stored data and repeatedly retrieves and rewrites the data. One example of such a device is a dynamic random access memory (DRAM). Typically this type of DR...

AI Technical Summary

Problems solved by technology

For example, a DRAM may be operating at 60°C, therefore, a relatively high frequency refresh clock is required, however, a temperature sensor may incorrectly detect the temperature as 45°C, and as a result, a low frequency refresh clock is selected

In this case, a refresh error occurs which may result in data loss

While the problem of temperature sensor changes can be mitigated by utilizing better performing sensors, doing so typically results in a larger temperature sensor size

Also, variations in DRAM caused by other manufacturing processes can change the length of time a DRAM can retain data at various temperatures

Additionally, for these sources of change, DRAM cells are exceptionally susceptible to damage over time, and some or all of the DRAM cells may not be successfully refreshed, potentially subjecting the computer system to a refresh failure of all DRAM cells

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