Method for making device with transistors of different types

A transistor and type of technology, applied in the direction of transistors, semiconductor devices, electric solid-state devices, etc., to achieve the effects of improving gate depletion, increasing production time, and high electron mobility

Inactive Publication Date: 2007-06-06
INT BUSINESS MASCH CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, apart from the extra effort involved in such chemical treatments, they only allow a limited range of possible material changes without adversely affecting other parts of the device.
In addition, some conventional techniques employ organic thin film deposition methods; however, these methods often suffer from compatibility issues with subsequent thermal treatments
In addition, some conventional processes require separate growth of gate oxides for different types of transistors, and also require independent patterning of different types of gate conductors

Method used

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  • Method for making device with transistors of different types
  • Method for making device with transistors of different types
  • Method for making device with transistors of different types

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Embodiment Construction

[0025] As described above, the present invention provides a process in which gate oxides can be formed simultaneously for all transistors of different materials and in which all gate conductors of transistors can be patterned simultaneously. This is shown in more detail in the partial cross-sectional schematic view of the integrated circuit shown in Figures 1-10. More specifically, FIG. 1 illustrates growth of a gate dielectric, which may be an oxide, oxynitride, or high-k dielectric (any compatible type), on a base substrate 9, which may be bulk silicon or silicon-on-insulator. A gate dielectric 10 is formed in the upper portion of the substrate 9 . Then an amorphous silicon layer 11 , a silicon germanium layer 12 and a polysilicon layer 13 are sequentially deposited on the gate dielectric 10 . The present invention may use any conventional deposition process such as any form of chemical vapor deposition (CVD) or physical vapor deposition (PVD) or any other known deposition ...

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Abstract

A method and structure for a method of manufacturing a device having different types of transistors, wherein gates of the different types of transistors in the device comprise different materials. The method comprises depositing a silicon layer on a gate dielectric layer, depositing a first-type gate material on the silicon layer, removing the first-type gate material from areas where a second-type gate is to be formed, depositing a second-type gate material on the silicon layer in areas where the first-type gate material was removed, and simultaneously patterning the first-type gate material and the second-type gate material into first-type and second-type gates, and anneal and transform the two types of gate materials.

Description

technical field [0001] The present invention relates generally to methods of fabricating devices employing different types of transistors, and more particularly to forming all gate oxides in a single step and simultaneously patterning all gate conductors with different materials in a single step craft. Background technique [0002] Recent advances in integrated circuit chip fabrication processes have allowed simultaneous fabrication of different types of transistors (N-type and P-type) on a single chip, each type having a gate electrode formed of a different material. This allows the performance of integrated circuit chips to be increased without increasing the manufacturing cost or time required to manufacture the chips. [0003] However, the process for fabricating integrated circuit chips for multiple transistors employing multiple gate conductor materials can still be further streamlined. For example, many common techniques perform redundant processing whereby differen...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/8234H01L21/336H01L21/00H01L21/28H01L21/8238H01L27/08H01L27/092H01L29/423H01L29/49H01L29/786
CPCH01L21/823842
Inventor 陈佳安德里亚斯·E·格拉斯曼
Owner INT BUSINESS MASCH CORP
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