Dynamic serializing of memory access in multiprocessor system
A memory and shared memory technology, applied in memory systems, electrical digital data processing, instruments, etc., can solve problems such as communication and delay increase
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[0010] figure 1 is a system overview of the multiprocessor system of the preferred embodiment;
[0011] figure 2 is in figure 1A block diagram of the address flow of a single memory controller in a multiprocessor system;
[0012] image 3 is a generalized diagram of the system overview of the optimal multiprocessor system;
[0013] 4 is a block diagram of a plurality of CPU read controllers that generate requests to the CPU read pre-priority stations;
[0014] Figure 5 is a block diagram of an encoder that creates a comparison identifier for the requester corresponding to the pipeline identifier;
[0015] Figure 6 is a block diagram of addresses maintained by a read controller and the manner in which the read controller provides address comparison;
[0016] Figure 6A is a block diagram of a pipeline supervisor;
[0017] Figure 7 is the generation block diagram of the pending reset;
[0018] Figure 8 is a block diagram of a set of requirements registers;
[0019] ...
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