Ethernet exchange chip output queue management and dispatching method and device

A technology of output queues and switching chips, applied in data exchange networks, data exchange through path configuration, transmission systems, etc., can solve problems such as inability to provide service quality, affecting queue resource usage, data frame selection and discarding, etc., to achieve low cost. , improve practicality, and reduce the effect of mutual influence

Inactive Publication Date: 2003-04-16
HISILICON TECH
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

In fact, the quality of service requirements for single and multicast data frames on the network are different, and they cannot be distinguished if they are mixed in the same queue, causing the two data frames to affect each other and cannot provide good quality of service, especially for multicast traffic. In larger cases, unicast traffic will be greatly impacted
[0020] Again, it is impossible to perform congestion control according to the characteristics of unicast and multicast traffic. The queue length is limited by the switching chip resources and cannot be infinitely long. I

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  • Ethernet exchange chip output queue management and dispatching method and device
  • Ethernet exchange chip output queue management and dispatching method and device
  • Ethernet exchange chip output queue management and dispatching method and device

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Embodiment Construction

[0043] Below according to accompanying drawing and embodiment the present invention will be described in further detail:

[0044] According to Fig. 6, Fig. 7, Fig. 8 and Fig. 9, with reference to Fig. 1, in the Ethernet switch chip, including input interface 1, shared cache 2, cache management module 4 and output interface 3, when data frames are written into the cache, the input Interface 1 extracts the information for forwarding the frame from the data frame, and sends it to the forwarding engine 5 together with the address of the data frame in the cache, and the forwarding engine 5 outputs the frame control block FCB to the output queue management module 6, and outputs Include a unicast / multicast message control separation module 61 in the queue management module 6 and frame control block FCB is output queue by the mode of unicast and multicast separation of every port, as shown in Figure 9, unicast data frame control block FCB passes through single Arbitration 62 for enter...

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Abstract

A management method and device of Ethernet chip output quene is that a single/multi message control separation module outputs queue from the frame control module based on single, multimessage separation way of each interface, the single data frame control module sets single-message queue in mode with multiple priority queue and uses congestion control algorithm to safeguard the single queue, the multiple one organizes in a way of FIFO queue to apply congestion control algorithm to directly discard queue end then carry out single/multi message priority quene matched arrangement. After interface dispatch between interfaces and priority dispatch inside interface in output quene dispatches, if single/multiple in priority.

Description

[technical field] [0001] The invention relates to electrical digital data processing technology and equipment, in particular to a method and device for managing and scheduling an output queue of an Ethernet switching chip. [Background technique] [0002] The forwarding process of the shared buffer Ethernet switch chip working in the store-forward mode can be described as follows with the following processing steps, as shown in Figure 1: [0003] 1. Receive and cache data frames: The data frames entering the switch chip from the external port are cached in the shared cache through the input interface, and the allocation of the shared cache is managed by the cache management module through the address pointer. In the process of subsequent processing, the data frame The body will always be stored in the shared cache, and only the cache address pointer is passed in the chip until the forwarding command reaches the output interface, and then the output interface reads the data fr...

Claims

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Application Information

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IPC IPC(8): H04L12/24H04L12/28
Inventor 林郁林晖崔靖杰刘永志唐焰谭锐张志强饶伟年孙杰杨智明
Owner HISILICON TECH
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