A co-processor for efficiently decoding codewords encoded according to a
Low Density Parity Check (LDPC) code, and arranged to efficiently execute an instruction to multiply the value of one
operand with the sign of another
operand, is disclosed.
Logic circuitry is included in the co-processor to select between the value of a second
operand, and an arithmetic inverse of the second operand value, in response to the
sign bit of the first operand. This
logic circuitry is arranged to operate according to 2's-complement integer arithmetic, by also including invert-and-increment circuitry to produce a 2's-complement inverse of the second operand. A
comparator determines whether the second operand is at a maximum 2's-complement negative value, in which case the arithmetic inverse is selected to be a hard-wired maximum 2's-complement positive value.
Logic circuitry is also included in the co-processor to execute an instruction to multiple the signs of two operands; this
logic circuitry is realized as an exclusive-OR function operating on the sign bits of the operands, and a
multiplexer for selecting between digital words of the values +1 and −1 in response to the exclusive-OR function. The
logic circuitry can be arranged in multiple blocks in parallel, to provide parallel execution of the instruction in wide
datapath processors.