Grid structure and manufacture method as well as MOS part of grid structure

Abstract

The grid structure includes first part of polysilicon layer as bottom layer, a polysilicon layer, and second partial polysilicon layer as top layer. The MOS semiconductor includes semiconductor substrate, a grid oxide layer forming on the semiconductor substrate, and a multi layer structural grid electrode including a polysilicon layer as bottom layer, a polysilicon middle layer and part of polysilicon top layer. Depositing semiconductor substrate under hydrogen environment forms the said first part of polysilicon layer and second part of polysilicon layer. The invention can manufacture transistors having following advantages: high grid activity of polysilicon, smooth surface of partial polysilicon, low cavity effect of polysilicon grid electrode and high carrier activity.

Description

technical field [0001] The invention relates to a transistor and a manufacturing method thereof, in particular to a metal oxide semiconductor transistor and a manufacturing method thereof. Background technique [0002] Metal-Oxide-Semiconductor Transistor (MOS) is a very important basic electronic component in VLSI technology. It is mainly composed of three basic materials, namely metal conductor layer, oxide layer and semiconductor layer. The gate transistor on the substrate; in addition, it also includes two semiconductor regions located on both sides of the gate transistor and electrically opposite to the semiconductor substrate, called source and drain. At present, when manufacturing gate transistors, the metal conductive layer is mostly composed of doped polysilicon (Polysilicon) and metal, and this structure is also called polycide silicide. [0003] Figure 1a-1c Shown is a flow chart of known steps for fabricating a gate. [0004] Please refer to Figure 1a Firstl...

AI Technical Summary

Problems solved by technology

When a voltage is subsequently applied to the gate 104a to allow electrons to reach the drain from the source through the channel below the gate 104a, the uneven electric field caused by the uneven interface between the gate 104a and the semiconductor substrate 101 will make the electrons in the channel The electrons are affected, causing the electrons to travel a longer path and degrading the electrical characteristics of the transistor

[0008] At the same time, in order to increase the density of components, the size of the components will be reduced as much as possible to increase the number of components; however, when the size of the components is reduced, the poly gate depletion effect (PED) will become serious

The so-called polysilicon gate depletion effect is that when the device size is reduced, the ratio of the depleted area between the metal layer and the oxide layer will increase and affect the speed of electrons, so that the operating speed of the device will be reduced.

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