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Non-blocking expansion method of three-level Clouse matrix

An expansion method and non-blocking technology, which is applied in the direction of digital transmission system, selection device of multiplexing system, electrical components, etc., can solve the problem that non-blocking cannot be realized

Inactive Publication Date: 2004-03-31
FENGHUO COMM SCI & TECH CO LTD
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Problems solved by technology

Moreover, the crossover granularity of high-end crossover chips used in high-speed optical communication systems in the industry is generally VC-4 or VC-3, the input port rate is at the mega (M) or gigabit (G) level, and the chip input / output port The rate is much higher than the data granularity of the cross connection, so it is impossible to use the conventional Clos (Clos) matrix to expand its cross matrix cross capacity
When using a cross matrix with a small cross capacity to expand to a cross matrix with a higher cross capacity, since the port rate of the cross matrix with a small cross capacity is not equal to the cross granularity, the conventional Clos (Clos) method cannot achieve strict non-blocking problems

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  • Non-blocking expansion method of three-level Clouse matrix
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  • Non-blocking expansion method of three-level Clouse matrix

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Embodiment Construction

[0036] Combine below Figure 5 to Figure 10 The illustrated examples further illustrate the method of the invention. It is worth mentioning that these examples are only for illustrating the present invention, rather than limiting the present invention.

[0037] Figure 5 It is the first embodiment of the first method of the present invention. Among them, 64 input-level unit cross-matrix modules (110) 8×16, 16 intermediate-level unit cross-matrix modules (210) 64×64, and 64 output-level unit cross-matrix modules (310) 16×8 chips are used to establish three-stage Clos (Clos) matrix (the above numbers refer to the number of ports, the port speed of the chip used in the figure is 622M, and the crossover granularity is VC3 or VC4). The data rate per port is 622Mb / s (778Mb / s if 8B / 10B encoding is used). There is one 622Mb / s channel connected between each input / output chip and each chip of the intermediate stage, as shown by channel 410 in the figure. Each 622Mb / s channel uses T...

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Abstract

The invention refers to a three-level Clos matrix non-blocking extension method. It selects the cross-module with input / output port speed higher cross-linking data granularity as Clos matrixí»s inputlevel module, middle level module and output level module. The input level moduleí»s output port connected to the middle level moduleí»s input port, the middle level moduleí»s output port connected to the output level moduleí»s input port, the input level moduleí»s input port used as the whole matrixí»s input port, and the output level moduleí»s output port used as the whole matrixí»s output port.

Description

technical field [0001] The invention relates to a non-blocking extension method of a three-stage Closian matrix. More precisely, the present invention relates to a method for extending a conventional three-level Clos matrix to realize a non-blocking large-cross-capacity cross-connect matrix. Background technique [0002] With the development of services such as multimedia, high-definition television (HDTV), video-on-demand, and broadband Internet access, people's demand for bandwidth is getting higher and higher. The application of dense wavelength division multiplexing (DWDM) system solves the problem of large-capacity optical transmission. However, the problem of small node crossing capacity is still not solved, thus becoming a bottleneck problem in the network. [0003] In optical cross-connection equipment and optical add-drop multiplexing equipment, there are a large number of cross-connection requirements. The cross-connect matrix provided by the present invention c...

Claims

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Application Information

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IPC IPC(8): H04J14/02H04L12/24H04L12/26H04Q3/52H04Q11/00
Inventor 魏学勤邵成思
Owner FENGHUO COMM SCI & TECH CO LTD
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