Data handling method of FIFO memory device

Abstract

The invention discloses the data processing method of a FIFO memory, and its kernel ideas: a write module internally buffers write data and address of FIFO, which make the buffered data and address lag the actual ones by a beat, and thus when the overflow occurs, it is able to write the buffered data added with an overflow flag in the position the buffered address points to, accordingly avoiding the data of the current read pointer. It is especially applied to the occasion of using FIFO to store the data with frame structure, able to correct the errors caused by asynchronism and effectively protect the data, furthest enhancing efficiency and utilization ratio of data storage.

Description

technical field [0001] The invention relates to the field of storage, in particular to a method for processing data by a first-in-first-out queue (hereinafter referred to as FIFO) memory. Background technique [0002] FIFO is a memory device widely used in the electronic field, usually used for buffering data and for accommodating frequency or phase differences of asynchronous signals. A common FIFO memory consists of a write control module, a read control module and a storage module. The working principle of FIFO is as follows: read / write data from / to the storage module sequentially under the control of read and write pulses with independent read and write address pointers. The read and write pointers start from the first address unit and read / write to the end sequentially. One address unit, and then back to the first address unit. Through the comparison of the read pointer and the write pointer, the judgment of whether the storage module is empty or full is given. [00...

AI Technical Summary

Problems solved by technology

[0005] The purpose of the present invention is to propose a data processing method for FIFO memory in order to solve the problems existing in the prior art that may cause data loss and bring certain performance waste

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