Data pass control device for masking write ringing in ddr sdram and method thereof

A technology for data transmission and control equipment, applied in the field of data transmission and control equipment

Inactive Publication Date: 2005-02-09
SK HYNIX INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0035] 4) However, in the case of related technologies, such as figure 2 As shown, after the falling edge of the fourth data strobe signal ds, for some reason, the oscillation occurs when the data strobe signal ds returns to the termination voltage or the standby voltage

Method used

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  • Data pass control device for masking write ringing in ddr sdram and method thereof
  • Data pass control device for masking write ringing in ddr sdram and method thereof
  • Data pass control device for masking write ringing in ddr sdram and method thereof

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Embodiment Construction

[0048] Preferred embodiments of the invention will now be described in more detail, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings and specification to refer to the same or like parts.

[0049] image 3 is a block diagram illustrating a data transfer controller for masking write oscillations in a DDR SDRAM according to the present invention.

[0050] Such as image 3 As shown, the data transfer controller for covering the write oscillation in DDR SDRAM includes: a data input buffer 300 for receiving data input from the outside; for receiving a data strobe signal input from the outside and outputting the first and a data strobe buffer 310 of the second control signal rdinclk, fdinclk; a data latch 320 for storing data output from the data input buffer 300 in response to the first and second control signals; for outputting the third control signal dis_dsz to control the data st...

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Abstract

The present invention relates to a data pass control device for masking a ringing of a data strobe that occurs when a write operation in a DDR SDRAM is completed. The data pass control device for masking the write ringing in the DDR SDRAM can be advantageously used for masking only a section with the ringing problem during the write operation, so that any unnecessary operations during the write operation can be eliminated and a more stable write operation can be realized by eliminating a write fail.

Description

technical field [0001] The present invention relates to a kind of data transfer control device and method for covering writing oscillation in DDR SDRAM (Double Data Rate Synchronous Dynamic Random Access Memory), in particular to a method for covering when the writing operation of DDR SDRAM is completed A data transfer control device and method thereof for occurring write oscillations. Background technique [0002] A DDR SDRAM is generally a storage device that generates an internal synchronous clock clk generated from an external synchronous clock ext_clk through a DLL circuit or other circuits, and then inputs / outputs data synchronized with rising and falling edges of the internal synchronous clock clk. The internal synchronous clock clk is also called the master clock main clk. [0003] What will be described here regarding the DDR SDRAM is a specific operation, that is, how to eliminate failure or misoperation of the storage device caused by oscillation during the write...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/40G11C7/10G11C7/24G11C8/00G11C11/4063G11C11/4078G11C11/4093
CPCG11C7/1093G11C7/1087G11C7/1078G11C11/40
Inventor 沈荣辅
Owner SK HYNIX INC
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