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Display device and projection type display device

A technology for display devices and display units, applied to static indicators, cathode ray tube indicators, instruments, etc., which can solve the problems of phase relationship deviation, no longer obtaining the best display image, and inability to deviate from phase relationship, etc.

Inactive Publication Date: 2005-06-22
SONY GRP CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0009] The existing technology is effective for adjusting the phase relationship between the write signal of the synchronous write operation and the video signal of the LCD before shipment, but cannot cope with the deviation of the phase relationship between the two after shipment
That is, even if there may be optimal phase adjustment before shipment, if the circuit elements are degraded due to temperature changes and aging, and thus, the liquid crystal drive pulses end up being delayed, so that the phase relationship deviates, and the optimal display image is no longer obtained

Method used

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  • Display device and projection type display device
  • Display device and projection type display device
  • Display device and projection type display device

Examples

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no. 1 example

[0030] A first embodiment of the present invention will be described in detail below with reference to the drawings. figure 1 is a block diagram of a system configuration of a display according to a first embodiment of the present invention, for example, an LCD using a liquid crystal cell as a display element of a pixel.

[0031] Such as figure 1 As shown, the LCD consists of LCD panels 11R, 11G and 11B corresponding to R (red), G (green) and B (blue), LCD driver 11, D / A converter 13, digital signal driver (DSD) 14, A A / D converter 15, timing generator 16, PLL circuit 17, R, G, B decoders 18R, 18G, and 18B, R, G, B delay counters 19R, 19G, and 19B, and edge detection circuit 20 are composed.

[0032] Here, the digital signal driver 14, the timing generator 16, the R, G, and B decoders 18R, 18G, and 18B, the R, G, and B delay counters 19R, 19G, and 19B, and the edge detection circuit 20 constitute the drive LCD panel 11R, The driving control circuit 21 of 11G and 11B. In t...

no. 2 example

[0108] Next, a second embodiment of the present invention will be described. Figure 10 is a system structure block diagram of the LCD of this embodiment. exist Figure 10 , those are assigned with figure 1 Parts with the same reference numerals as in the LCD in the first embodiment shown are figure 1 The same parts as those in . Therefore, LCD driver 12, DSD 14, and timing generator 16 are connected with figure 1 Parts shown are the same. exist Figure 10 In , the PLL circuit 17 for generating the main clock MCK is omitted, but the accuracy of the delay amount can be improved by generating the main clock MCK of any frequency by the same structure as that of the LCD of the first embodiment.

[0109] The present embodiment is characterized by LCD panels 70R, 70G, 70B. These LCD panels include phase adjustment circuits 71R, 71G, 71B. can be configured by configuring the first embodiment figure 1 Edge detection circuit 20, delay counters 19R, 19G, 19B, and decoders 1...

no. 3 example

[0111] A third embodiment of the present invention will be described below. The block diagram of the LCD in this embodiment is the same as that of the LCD in the second embodiment. The phase adjustment circuits 71R, 71G, 71B are composed of Figure 11 Circuit configuration of the block diagram shown. Each phase adjustment circuit in this embodiment has an inverter (inverter) 711, a phase detector (PD) 712, a low-pass filter (LPF) 713, a voltage-controlled oscillator (VCO) 714, and a phase processing unit 715. The phase detector 712, the low-pass filter 713, and the voltage-controlled oscillator 714 constitute a phase detector.

[0112] In the phase adjustment circuits 71R, 71G, 71B, by detecting the phase of the SOUT signal (R_SOUT, G_SOUT, B_SOUT) from the video display unit by the phase detector 712, and in the phase width control clock pulses DCK1 and DCK2 of the phase processing unit The timing of the switching pulses is adjusted to reflect phase shifts due to temperat...

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Abstract

A display having a display unit is configured such that pixels are arranged in a matrix. The clock pulse generation unit generates clock pulses of any frequency. Based on the generated clock pulses, the pulse generating section generates timing signals for parallel array processing of video signals in units of a plurality of pixels as a pulse signal capable of freely setting a pulse width and a pulse period. The phase shift detection part detects a phase shift amount after a write signal generated based on the timing signal, and writes a video signal through a plurality of pixel values ​​of the display unit. Based on the phase shift amount detected by the phase shift detection part, the timing adjustment part automatically performs adjustment so that the phase shift amount is within a predetermined range (so that it becomes almost zero).

Description

technical field [0001] The present invention relates to a display device and a method for controlling the display device, and a projection display device, in particular to a display unit in which pixels are arranged in a matrix in the horizontal direction (column direction), and a plurality of pixels are parallelized at one time. Displays and projection-type displays (projectors) of systems that write video signals. Background technique [0002] In a display such as a liquid crystal display (LCD) using a liquid crystal cell as a display element of a pixel, a digital signal processing IC formed by a MOS process of a gate array is generally used as a signal processing system. Digital data subjected to predetermined signal processing by such a digital signal processing IC is converted into an analog signal by a digital / analog (D / A) converter, and then supplied to a liquid crystal panel (hereinafter described as "LCD panel") through an LCD driver. The LCD panel provides pixels ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G02F1/133G03B21/00G09G3/20G09G3/36G09G5/00
CPCG09G3/2003G09G5/008G09G2310/0275G02F1/133G09G3/36
Inventor 吉田麻美松浦稔平川孝
Owner SONY GRP CORP
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