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IC packaging process

A packaging process and filling glue technology, which is applied in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., can solve problems such as cutting and testing troubles, lead frame variation, and cost increase

Inactive Publication Date: 2005-12-07
MUTUAL TEK INDS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] As the types and characteristics of semiconductor components change more and more, in the above-mentioned process, users often encounter the variation that the specifications of the lead frame cannot match the semiconductor IC chip, so that the size of the lead frame must be re-trimmed during packaging. Meet the specifications of the semiconductor IC chip, or find another semiconductor IC chip that meets the specification of the lead frame; no matter which method is used, the user will spend a lot of unnecessary manpower to search for the semiconductor IC chip and wires that match each other frame; this kind of action is nothing more than an intangible increase in the cost of production, and in the new packaging products such as: QFN package, it is difficult to use a general lead frame, and there must be a sealing bottom pad when pouring glue to avoid Glue overflow, after the glue filling is completed, the bottom pad must be removed
And the wires are connected in one piece, so cutting and testing will be quite troublesome

Method used

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Embodiment Construction

[0034] Please refer to Fig. 1 to Fig. 1 of the accompanying drawings of the present invention Figure 11 Shown, wherein, the IC chip encapsulation process of filling glue wire shown in the present invention mainly has included following process:

[0035] A substrate is prepared, wherein the substrate 10 can basically be a copper plate or a metal plate that can be plated and etched. Then, the wire 11 or conductor is formed on the substrate 10 by etching or electroplating to form an extension wire or a bump. Furthermore, the filling glue material 12 is coated or pressed onto the surface of the wire 11 or the conductor bump to form a layer of colloid-bonded substrate, wherein the filling glue material 12 can be of high dielectric or high thermal conductivity Polymer Materials. After the step of filling the glue is completed, the copper or metal surface is exposed by etching, developing or grinding to serve as the bonding point 13 for component bonding. After that, a metal prot...

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Abstract

An IC package process, especially using high molecular adhesive filling in line in IC package, in said process, the substrate or carrier board having adhesive filled separated extension line or convex block before semiconductor IC device binding, so the device binding has not the limitation that the line or convex block must be connected or the seal glue must be sealed, the package and test can be easily completed.

Description

technical field [0001] The present invention mainly relates to an IC packaging process, in particular to an IC packaging process in which glue is filled inside wires. Since the conductors or bumps of the lead substrate with filling glue have been completely separated and fixed before die bonding, wire bonding or flip chip, there will be no damage caused by wire connection during die bonding, wire bonding, flip chip and sealing. And the limitation of bare space, so that the packaging and testing process can have a large degree of freedom. The test can also be used for the whole strip test (Strip Test), and the test can only be carried out after separation. There is considerable competition in production speed and cost. force. Background technique [0002] In the traditional semiconductor IC packaging process, there are generally three different levels of procedures (1) semiconductor IC chip; (2) lead frame or substrate; (3) IC chip assembly (die bonding, wire bonding or Fli...

Claims

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Application Information

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IPC IPC(8): H01L21/50
CPCH01L2224/48091H01L2224/73204H01L2224/92125H01L2224/97H01L2924/181
Inventor 黄禄珍
Owner MUTUAL TEK INDS