Flash memory cell and manufacturing method thereof
A storage unit and manufacturing method technology, applied in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., can solve problems such as affecting adjacent storage units, and achieve the effect of improving reliability
Inactive Publication Date: 2006-05-10
POWERCHIP SEMICON CORP
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[0008] In view of this, the object of the present invention is to provide a flash memory unit to solve the problem that the programming operation of the flash memory unit is currently being performed, and when a voltage is applied to the flash memory unit, it will affect adjacent memory cells. The problem
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[0043] In the following embodiments, the present invention is described by taking the first conductivity type as n-type doping type and the second conductivity type as p-type doping type. However, those skilled in the art can easily deduce that the doping types of the first conductivity type and the second conductivity type can be exchanged, so the description of the opposite doping types of the following embodiments is omitted. In addition, in the following embodiments, NOR array flash memory cells sharing the same source region are used for illustration.
[0044] Figure 2A to Figure 2C It is a schematic cross-sectional view showing a manufacturing process of a flash memory unit according to a preferred embodiment of the present invention.
[0045] Please refer to Figure 2A , providing a substrate 200, which is, for example, an n-type substrate. After that, a p-type deep well region 202 is formed in the substrate 200 , and an n-type well region 204 is formed in the p-type ...
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This invention relates to one flash memory unit, which comprises well area, deep well area, grating stack structure, source electrode area, leakage electrode area, choosing electrode, grating medium layer, shallow mixture area and conductive plug, wherein, The deep well is located in base; The grating stack structure is located on the base; The source and leakage areas are located in the base of grating electrode structure; The choosing electrode is located between grating stack structure and source electrode area and the side wall of grating stack structure on base. The grating medium layer is located between the choosing electrode and grating electrode stack structure and base. The shallow mixed area is located on grating stack structure and choosing electrode. The deep mixed area is located in base of one side of grating electrode. The conductive plug is located on base, stretching down through leakage area and part deep mixture area. The deep well is located in base.
Description
technical field [0001] The invention relates to a non-volatile memory and a manufacturing method thereof, in particular to a flash memory unit and a manufacturing method thereof. Background technique [0002] Flash memory has the advantages of being able to store, read, and erase data multiple times, and the stored data will not disappear after power failure, so it has become a widely used in personal computers and electronic devices. non-volatile memory element. [0003] A typical flash memory uses doped polysilicon to make a floating gate (Floating Gate) and a control gate (Control Gate). When programming or erasing the flash memory element, apply appropriate voltages to the source region, the drain region and the control gate respectively, so that electrons are injected into the floating gate, or electrons are transferred from the floating gate pull out. Generally speaking, the electron injection modes commonly used in flash memory can be divided into Channel Hot-Elect...
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IPC IPC(8): H10B99/00H01L21/8247H10B69/00
Inventor 杨青松翁伟哲
Owner POWERCHIP SEMICON CORP