Semiconductor die package with increased thermal conduction
A chip and chip pad technology, applied in the direction of semiconductor devices, semiconductor/solid-state device components, electric solid-state devices, etc., can solve the problems of low thermal conductivity, low-efficiency heat conduction, and low efficiency of GaAs chips
Inactive Publication Date: 2006-06-21
SKYWORKS SOLUTIONS INC
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Problems solved by technology
However, due to the arrangement of conventional substrates, and the manufacturing process associated with conventional substrates, the thermal conduction path through the semiconductor package is severely limited
For example, in multilayer substrates such as four-layer substrates, thermal conduction is especially limited
As a result of inefficient heat conduction, heat dissipation is severely limited, and semiconductor devices utilizing this package suffer from poor performance and poor package reliability
GaAs chips have a much lower thermal conductivity (45W / mK) compared to that of silicon (160W / mK), and as a result, the inefficiency of heat conduction in conventional packages poses a greater problem for GaAs devices
Method used
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[0020] The present invention is directed to a semiconductor chip package with improved heat conduction. The following description contains specific information for practicing the invention. Those skilled in the art will recognize that the invention may be practiced otherwise than as specifically discussed in this application. Furthermore, some specific details illustrating the invention have not been discussed in order not to obscure the invention. Specific details not described in this application are known to those of ordinary skill in the art.
[0021] The drawings in this application and their associated detailed description are intended to be exemplary embodiments of the invention only. In the interest of maintaining brevity, other embodiments of the invention that utilize the principles of the invention are not specifically described in this application, nor are they specifically shown in the present drawings. It should be noted that for ease of illustration, various ...
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Abstract
In one exemplary embodiment, a structure includes a substrate having a core, a top surface, and a bottom surface. A substrate chip pad is located on the top surface of the substrate and is capable of receiving a chip, and a heat sink is located on the bottom surface of the substrate. The substrate also includes a first metal cladding, at least one buried via, and a second metal cladding. The first metal cladding layer is located under the substrate chip pad and thermally connected thereto. The at least one buried via is located under the first metal cladding and within the core of the substrate. The second metal cladding is located under the at least one buried via and is thermally connected to the second metal cladding.
Description
technical field [0001] The present invention generally relates to the field of semiconductors. More specifically, the present invention relates to the field of semiconductor chip packaging. Background technique [0002] During semiconductor packaging, chips are mounted on chip pads fabricated on the surface of the substrate. After the chip is mounted on the substrate, the chip bond pads on the chip are electrically connected to their corresponding substrate ground pads and substrate signal pads on the substrate using bond wires. Vias in the substrate provide connections between the substrate die pads and the heat sink on the bottom surface of the substrate. This connection can also have an electrical function. The vias also provide connections between the substrate signal pads to corresponding substrate signal lands on the bottom surface of the substrate. [0003] An important function performed by the substrate is to dissipate the heat generated by the chip during opera...
Claims
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Patent Timeline
Login to View More IPC IPC(8): H01L23/053H01L23/36
CPCH01L23/3677H01L23/3735H01L24/48H01L2224/05599H01L2224/45099H01L2224/48091H01L2224/48227H01L2224/854H01L2924/00014H01L2924/01078H01L2924/01087H01L2924/12041H01L2924/00H01L2224/45015H01L2924/207H01L23/32H01L23/36
Inventor S·L·佩蒂-威克斯
Owner SKYWORKS SOLUTIONS INC