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Pulse gating circuit and its design method

A pulse and circuit technology, applied in the direction of pulse generation, pulse technology, electric pulse generation, etc., can solve the problems of difficulty in making custom circuits, skew, and more time, and achieve the effect of less delay

Active Publication Date: 2006-06-28
VIA TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In order to avoid large input capacitance, a buffer before inputting pulse signal CK or outputting valid pulse signal ECK is necessary, so custom-designed circuits require more time
Moreover, these additional buffers designed in the pulse gate control circuit 24 will cause a delay between the CK terminal and the ECK terminal, thereby causing additional pulse skew and possibly increasing the setting time of the enable signal E
[0011] Although a custom circuit can be designed around a pulse gating unit to meet processor specifications, building such a complex custom circuit is therefore difficult to fabricate and requires more time and effort to design, implement, Characterization and Integration

Method used

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  • Pulse gating circuit and its design method
  • Pulse gating circuit and its design method
  • Pulse gating circuit and its design method

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Embodiment Construction

[0023] The present invention will be described in detail with some embodiments as follows. However, the invention can be broadly implemented in other embodiments than the disclosed ones. The scope of the present invention is not limited by these embodiments, but is subject to the scope of the subsequent patent applications. In order to provide a clearer description and enable those skilled in the art to understand the content of the invention, the various parts in the illustrations are not drawn according to their relative dimensions, and the ratio of some dimensions to other relative dimensions will be highlighted to appear exaggerated , and irrelevant details are not fully drawn for simplicity of illustration.

[0024] In order to overcome the aforementioned shortcomings of the prior art, the present invention proposes an improved pulse gating circuit. In particular, a pulse gating circuit with a simplified design is proposed to provide circuit designers with easier integr...

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Abstract

The invention provides a pulse gating control circuit and a method for designing the pulse gating control circuit. In an embodiment of the design method, a layout of a D-type flip-flop is included, wherein the D-type flip-flop has a reset terminal and two latches. The above method further includes modifying the layout of the D-type flip-flop to create a pulse gating circuit.

Description

technical field [0001] This invention relates to processors, and more particularly to pulse gating circuits for controlling pulse action within processors. The invention also discloses a method for designing a pulse gating circuit. Background technique [0002] A processor usually includes a timing component (eg, a clock or a pulse generator) for providing a reference pulse signal used to set the operating timing of components of the processor. The operation of each component is timed in the manner described above, thereby synchronizing all other components of the processor. [0003] However, a significant portion of the processor's overall power consumption is that the power supply must distribute the main pulses throughout the processor. Therefore, power consumption becomes a problem that cannot be ignored, especially in hand-held electronic devices that use batteries to supply processor power. Since processor pulses typically consume considerable battery power, it is k...

Claims

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Application Information

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IPC IPC(8): G06F1/32
CPCG06F1/10H03K3/356156H03K3/356173
Inventor 咸正勋
Owner VIA TECH INC