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Circuit struction of reverse order / circulation address generater

A circuit structure and generator technology, applied in the field of computer architecture, can solve problems affecting system operation speed, large system power consumption, etc., achieve the effect of reducing AT2 and improving execution efficiency

Inactive Publication Date: 2007-02-21
CHINA AEROSPACE TIMES ELECTRONICS CORP NO 771 RES INST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

This frequent write operation will cause a lot of system power consumption and affect the operation speed of the system

Method used

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  • Circuit struction of reverse order / circulation address generater
  • Circuit struction of reverse order / circulation address generater
  • Circuit struction of reverse order / circulation address generater

Examples

Experimental program
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Embodiment Construction

[0056] SMDSP high-performance digital signal processor, 24-bit address line, which supports sequential, reverse and circular addressing. The address generator within the SMDSP uses a Figure 4 The circuit structure of the reverse / circular address generator, including:

[0057] A five-terminal input selector. The five-terminal input selector determines the data of the five-input strobe according to the addressing type control signal type. The 5 data to be strobed are from top to bottom: "step" (when type indicates circular addressing, select it); "immediaat_value" (when type indicates immediate addressing, select it); "MR" (when type indicates base address indexing addressing, select it); "1" (when type indicates sequential addressing, select it); "L / 2" (when type indicates reverse order When addressing, strobe it). The output of the five-input selector is connected to one input of the adder and the inverse adder.

[0058] an adder. Except for the reverse addressing mode,...

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Abstract

A circuit structure of reversal / cyclic address generator consists of input selector with five ends, input selector with three ends, LT generating logic module, adder, inverse adder, bit AND operation module, bit OR operation module, comparison logic module and revision logic module. The reversal / cyclic address generator with said circuit structure can support reversal / cyclic addressing mode and can support data addressing of digital signal treatment algorithm such as FFI and convolution as well as correlation for raising execution efficiency of algorithm.

Description

technical field [0001] The present invention belongs to the field of computer architecture. The address generator is an important functional part of the digital signal processor. Using the new reverse / circular address generator invented by us, the execution efficiency of the typical application of the digital signal processor is significantly improved. Background technique [0002] In order to improve the performance of the microprocessor, one of the commonly used methods is to embed a hardware address generator in the processor to make the data address operation and data operation parallel. The function of the traditional address generator is limited to simple addition and subtraction operations, and its structure can be used figure 1 Unified expression. Because the traditional address generator calculates the address in a single way, it is only suitable for address calculation in the sequential access mode of data. According to commonly used d...

Claims

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Application Information

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IPC IPC(8): G06F17/14
Inventor 车德亮刘文平
Owner CHINA AEROSPACE TIMES ELECTRONICS CORP NO 771 RES INST
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