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Insulated pad conditioner and method of using same

A technology of electrical insulation and tool adjustment, which is applied in the field of polishing technology, and can solve problems such as increased efficiency of wafer planarization process, unfavorable liner adjuster, and impact on production efficiency.

Inactive Publication Date: 2007-03-14
3M INNOVATIVE PROPERTIES CO
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] Replacement of a deactivated pad conditioner in a wafer processing system can adversely affect production efficiency as well as bring about undesired changes to wafer processing conditions
Accordingly, if the lifetime of the pad conditioner can be increased, the efficiency of the wafer planarization process will also be increased

Method used

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  • Insulated pad conditioner and method of using same
  • Insulated pad conditioner and method of using same
  • Insulated pad conditioner and method of using same

Examples

Experimental program
Comparison scheme
Effect test

example 1

[0042] The pad adjuster of the present invention was prepared and tested in the same manner as in Comparative Example 2 except that no current was applied. After the test had run for about 16 hours, no corrosion had occurred.

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Abstract

A wafer planarization process using an alignment tool (14). The adjusting tool (14) has an electrical insulator that electrically insulates the grinding surface of the adjusting tool (14). The electrical insulator extends the service life of the abrasive surface of the adjustment tool (14) by reducing the extent of electrochemically induced corrosion.

Description

technical field [0001] The present invention mainly relates to a polishing process, and in particular, to a planarization process for semiconductor device processing. More specifically, the present invention relates to planarization processes with electrically insulating pad regulators. Background technique [0002] During processing, semiconductor wafers for semiconductor fabrication typically go through a number of processing steps including, patterning, and etching steps. For details on semiconductor wafer processing steps, see "Abrasive Machining of Silicon" by Tonshoff et al., Annals of the international Institution for Production Engineering Research, (Volume 39 / 2 / 1990), pp. 621-635. At each processing step, it is often necessary or desirable to modify or polish exposed surfaces of the wafer in order to prepare the wafer for subsequent fabrication or processing steps. [0003] One method of modifying or refining the exposed surface of a wafer involves treating the wa...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): B24B53/007B24B37/04
CPCB24B37/042B24B53/017B24B37/046B24B53/007B24B37/04C09K3/14
Inventor 加里·M·帕尔姆格伦布赖恩·D·格斯道格拉斯·J·皮谢尔
Owner 3M INNOVATIVE PROPERTIES CO
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