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Quick Hadamard transform device

A technology of conversion device and hada, which is applied in the field of frame synchronization device, can solve problems such as not suitable for use, and achieve the effect of improving accuracy and simple interface

Active Publication Date: 2007-03-28
SANECHIPS TECH CO LTD
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Problems solved by technology

[0022] It can be seen that in order to overcome fading and improve the signal-to-noise ratio, the output of the FHT needs to be accumulated; in order to continuously process multiple sampling points around the time slot synchronization, the output of the FHT needs to pass through a series of data channels serially Follow-up processing, so the existing FHT device is not suitable for use in the actual cell search frame synchronization device

Method used

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Embodiment Construction

[0052] Below in conjunction with the accompanying drawings, the present invention will be further described in detail.

[0053] The fast Hadamard conversion device of the present invention includes a control unit 0 and four pipeline computing units: a first-stage computing unit 1, a second-stage computing unit 2, a third-stage computing unit 3, and a fourth-stage computing unit 4. As shown in FIG. 2 and FIG. 3, the control unit 0 is used to control the working timing of the four computing units, generate corresponding control signals, and control the delay and selection of the internal data of each computing unit;

[0054] The first-level operation unit 1 is used to cross every two input data of the FHT (the number of crossing stages is 2 0 ) are paired to complete the first-level butterfly operation, and the result is output to the second-level operation unit 2;

[0055] The second-level computing unit 2 is used to cross every two output data of the first-level computing uni...

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Abstract

This device includes a control unit and four calculation units (CU) connected in cascade. The control unit controls the working time sequence of the four CUs. It produces the relative control signal to control the delay and selection of the data inside each CU. The 1st CU matches mutually pairs for every two input data converted by fast Hadamard converter to accomplish the first class butterfly calculation. Its result output is sent to the 2nd. Thus each CU matches mutually pairs for every two output data from the former class CU, accomplishes the butterfly calculation of this class and outputs the result to the next CU until the output is the final result of the 16 points fast Hadamard conversion. This device adopts processing in serial mode to realize the calculation with only few hardware. The invention raises the precision of frame synchronization.

Description

technical field [0001] The present invention relates to a kind of device in the WCDMA (Wideband Code Division Multiple Access) system of FDD (Frequency Division Duplex) mode in the third generation of mobile communication, specifically relate to a kind of cell search of MS (Mobile Terminal) in WCDMA system The frame synchronization device in. Background technique [0002] In the WCDMA system, the realization of cell search generally adopts a three-step fast search method. [0003] The first step is to capture the main synchronization channel, complete the time slot synchronization, and identify the strongest base station; the second step is to capture the auxiliary synchronization channel, complete the frame synchronization, and identify the scrambling code group information; the third step is to find out the common pilot channel Correlation, identify the scrambling code used by the cell. [0004] Frame synchronization is the second step of cell search. It is used to captu...

Claims

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Application Information

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IPC IPC(8): H04B7/26
Inventor 黄舒怀
Owner SANECHIPS TECH CO LTD
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