Method and circuitry for soft fuse row redundancy with simple fuse programming

a technology of soft fuse and programming method, which is applied in the direction of pulse generator, pulse technique, instruments, etc., can solve the problems of large design footprint, inoperable bad location, and unnecessary signal path length resulting from the use of hard fus

Inactive Publication Date: 2001-10-18
SUN MICROSYSTEMS INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The programmable soft fuse enables efficient and non-destructive disabling of defective memory cells, reducing signal path length and allowing for post-manufacturing detection and correction of defects, thus minimizing waste and optimizing RAM cell array performance.

Problems solved by technology

For example, because of the destructive nature of the laser cutting, the hard fuses must be located away from other sensitive parts on the chip, thus necessitating a larger design footprint.
If a defective location is detected, a corresponding hard fuse F1 is severed, rendering the bad location inoperable.
Hence, any unnecessary signal path length resulting from the use of hard fuses is a great disadvantage.
An additional disadvantage is created by the permanency of the hard fuse operation.
As a consequence, if there are further failures after the sealing of the array, the entire array must be scrapped.

Method used

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  • Method and circuitry for soft fuse row redundancy with simple fuse programming
  • Method and circuitry for soft fuse row redundancy with simple fuse programming
  • Method and circuitry for soft fuse row redundancy with simple fuse programming

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Embodiment Construction

[0026] Persons of ordinary skill in the art will realize that the following description of the present invention is illustrative only and not in any way limiting. Other embodiments of the invention will readily suggest themselves to such skilled persons having the benefit of this disclosure.

[0027] FIG. 3 is a block diagram of the present invention. Address information is presented to address decoder 32 on address line 31. Data is output from address decoder 32 and presented to programmable soft fuse 34 via address line 33. Programmable soft fuse 34 is connected to RAM cell array 36 by address line 35. Note that RAM cell array 36 does not contain a hard fuse area, as does the prior art RAM cell array 40 in FIG. 1, resulting in significant area savings.

[0028] FIG. 4 shows a block diagram of a programmable soft fuse according to a preferred embodiment of the present invention. At the center of the soft fuse is electronic switch 100. Switch 100 has an input 104, and an output 103.

[0029]...

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Abstract

The present invention relates to the use of a programmable soft fuse for disabling a signal line using an electronic switching circuit, a latch, a control circuit, and a reset circuit. In another preferred embodiment, a precharge device is included. A method of disabling a data line using a soft fuse is disclosed, where the steps are: providing a soft fuse having a control means, providing a memory array, providing an address decoder, connecting the soft fuse between the address decoder and the memory array, testing the memory array, locating a bad address line in the array, entering the location of the bad address line into the address decoder, and strobing the control means. A further method is disclosed, which has the additional steps of: providing shifting circuitry, connecting the shifting circuitry to the address decoder, the soft fuse circuitry, and the memory array accepting data from the address decoder into the shifting circuitry, and providing the data to at least one predetermined row in the memory array.

Description

[0001] 1. Field of the Invention[0002] The present invention relates to the disabling of signal lines. More particularly, the present invention relates to the use of programmable soft fuses for disabling address lines in an array of random access memory (RAM).[0003] 2. The Prior Art[0004] The problems associated with the failure of individual memory cells in a RAM cell array are well known in the art. During the fabrication stage, when a failure is detected in a memory cell, the row that contains the defect must be disabled. One method known in the art of disabling a row of memory is to use a hard fuse. A hard fuse is a miniature fuse fabricated from metal and disposed on the silicon. When it is desired to disable a particular row of memory, the fuse is severed, typically with a laser.[0005] FIG. 1 shows a prior art system incorporating a RAM cell array with hard fuses. FIG. 1 shows address line 10 coupling address information into address decoder 20. Address decoder 20 then properl...

Claims

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Application Information

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Patent Type & AuthorityApplications(United States)
IPC IPC(8): G11C29/00
CPCG11C29/70
InventorSMOSZMA, MAREK
OwnerSUN MICROSYSTEMS INC