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Method for operating core logic unit with internal register for peripheral status

a logic unit and status information technology, applied in computing, instruments, data conversion, etc., can solve the problems of large disadvantages of shared interrupt architecture, inability of central processing unit to tell, and time-consuming polling process

Inactive Publication Date: 2002-03-07
MICRON TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, a shared interrupt architecture suffers from a major disadvantage.
This is because all of the peripheral devices generate the same interrupt signal, and the central processing unit cannot tell from the interrupt signal which peripheral devices require servicing.
This polling process can be quite time-consuming.
Polling reduces CPU efficiency, because the CPU must perform multiple bus transactions to poll the peripheral devices, and each bus transaction can require a large number of CPU cycles in a high performance computing system.
Furthermore, polling increases the time required for servicing an interrupt.
This may create problems for peripheral devices that require servicing in a timely manner.

Method used

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  • Method for operating core logic unit with internal register for peripheral status
  • Method for operating core logic unit with internal register for peripheral status
  • Method for operating core logic unit with internal register for peripheral status

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Embodiment Construction

[0032] FIG. 1 illustrates a prior art computer system, wherein a processor 100 reads status registers 112, 122 and 132, located at respective peripheral devices 110, 120 and 130. Processor 100 is coupled to memory 101 and bus 105 through core logic unit 103. Processor 100 can access peripheral devices 110, 120 and 130 through bus 105. In response to an interrupt, processor 100 polls status registers 112, 122 and 132 in order to determine which of peripheral devices 110, 120 and 130 require processing. This polling requires multiple operations over bus 105.

[0033] FIG. 2 illustrates a computer system including a processor 100 with a core logic unit 103 with an internal status register 107 for storing the status of peripheral devices in accordance with an embodiment of the present invention. As in the system illustrated in FIG. 1, processor 100 is coupled to memory 101 and bus 105 through core logic unit 103. Processor 100 can access peripheral devices 110, 120 and 130 through bus 105....

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Abstract

One embodiment of the present invention provides a method that maintains status information for several peripheral devices in a status register, which is located within a core logic unit in the computer system. In this embodiment, a peripheral device updates the status register if its status changes by performing a bus master operation to transfer status information to the status register. It then generates an interrupt to indicate to a processor that it requires servicing. When the processor services the interrupt, the processor merely has to read the status register to determine which peripheral device requires processing. This is a very fast operation because the status register is internal to the core logic. No time-consuming polling of peripheral devices is required to determine the status of the peripheral devices.

Description

[0001] The subject matter of this application is related to the subject matter in three co-pending non-provisional applications by the same inventor as the instant application and filed on the same day as the instant application, entitled: "Processor with Internal Register for Peripheral Status," having serial number TO BE ASSIGNED, and filing date TO BE ASSIGNED (Attorney Docket No. MEI97-138400); "Core Logic Unit with Internal Register for Peripheral Status," having serial number TO BE ASSIGNED, and filing date TO BE ASSIGNED (Attorney Docket No. MEI97-138401; and "Method for Operating Processor with Internal Register for Peripheral Status," having serial number TO BE ASSIGNED, and filing date TO BE ASSIGNED (Attorney Docket No. MEI97-138402). Attorney Docket No. MEI-97-01386.00 Inventor: Dean A. Klein[0002] 1. Field of the Invention[0003] The present invention relates to peripheral devices in computer systems, and more particularly to a processor with an internal register for mai...

Claims

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Application Information

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IPC IPC(8): G06F13/12
CPCG06F13/126
Inventor KLEIN, DEAN A.
Owner MICRON TECH INC
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