Method of fabricating SiC semiconductor device

a technology of semiconductor devices and semiconductors, applied in the direction of semiconductor devices, basic electric elements, electrical equipment, etc., can solve the problems of difficult nullification of remaining carbon and high interface level density, and achieve the effects of low interface level density, good channel mobility, and reduced carbon remaining

Inactive Publication Date: 2005-03-24
HISADA YOSHIYUKI +2
View PDF7 Cites 27 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0011] It is an object of this invention to sufficiently reduce the amount of carbon remaining in an SiO2 / SiC interface to provide a low interface level density and a good channel mobility. A first aspect of this invention provides a method of fabricating a SiC semiconductor device. The method comprises the steps of processing a surface of a SiC layer (5, 48, 102) into a cleaned surface terminated at Si; forming an oxide film (7, 49, 105) on the cleaned surface of the SiC layer; and subjecting the SiC layer with the oxide film to thermal oxidation at a temperature in a range of 700° C. to 900° C., thereby oxidating only terminal Si at the cleaned surface of the SiC layer and causing an interface between the oxide film and the SiC layer to be an SiO2 / SiC cleaned interface.
[0014] A fourth aspect of this invention provides a method of fabricating a SiC semiconductor device. The method comprises the steps of processing a surface of a SiC layer (5, 48, 102) into a cleaned surface terminated at Si; forming an oxide film (7, 49, 105) on the cleaned surface of the SiC layer; and subjecting the SiC layer with the oxide film to heat treatment at a temperature in a range of 800° C. to 1000° C., thereby enabling terminal Si at the cleaned surface of the SiC layer and SiO2 in the oxide film to be electrically active and causing an interface between the oxide film and the SiC layer to be an SiO2 / SiC cleaned interface.

Problems solved by technology

It is thought that such impurity causes the high interface level density.
According to the method in Japanese application 2001-17263, it is difficult to nullify the amount of remaining carbon.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method of fabricating SiC semiconductor device
  • Method of fabricating SiC semiconductor device
  • Method of fabricating SiC semiconductor device

Examples

Experimental program
Comparison scheme
Effect test

first embodiment

[0065]FIG. 1 shows an n-channel planar MOSFET fabricated according to a first embodiment of this invention. The n-channel planar MOSFET is also referred to as an n-channel vertical power MOSFET.

[0066] The vertical power MOSFET in FIG. 1 includes an n+ type substrate 1 made of silicon carbide (SiC). The n+ type substrate 1 has an upper surface constituting a main surface 1a, and a lower surface constituting a back surface 1b opposite to the main surface 1a. An n− type drift layer 2 made of SiC is superposed on the main surface 1a of the n+ type substrate 1. The n− type drift layer 2 is lower in dopant concentration than the n+ type substrate 1. Thus, the n− type drift layer 2 is higher in resistivity than the n+ type substrate 1. The main surface 1a of the n+ type substrate 1 and an upper surface of the n− type drift layer 2 agree with (0001) planes. Thus, regarding crystals forming the n+ type substrate 1 and the n− type drift layer 2, orientation (plane orientation) causing a lowe...

second embodiment

[0094] A second embodiment of this invention is similar to the first embodiment thereof except for design changes mentioned hereafter.

[0095] According to the second embodiment of this invention, after the exposed surface of the surface channel layer 5 is processed into a Si-terminated cleaned surface, a protective film is deposited on the surface of the surface channel layer 5 in an ultra-high vacuum chamber. The protective film includes an SiOx film or a nitride film. The protective film prevents impurity from adhering to the surface of the surface channel layer 5. Thus, a high interface level density caused by impurity is prevented from occurring.

[0096] In the case where the protective film includes a nitride film, an ONO film composed of the protective film and an SiO2 film provided on the surface of the surface channel layer 5 can be used instead of the gate oxide film 7.

third embodiment

[0097] A third embodiment of this invention is similar to the first embodiment thereof except for design changes mentioned hereafter.

[0098] The third embodiment of this invention is designed to reduce the amount of carbon remaining in the interface between the gate oxide film 7 and the surface channel layer 5 according to a modified procedure.

[0099] After the removal of the LTO film 22 (see FIGS. 6 and 7), the exposed surfaces of the semiconductor body are cleaned. Thereafter, as shown in FIG. 19, a Si layer 30 is formed on an upper surface of the surface channel layer 5. As in the first embodiment of this invention, the Si layer 30 is processed so that the upper surface of the surface channel layer 5 becomes an Si-terminated cleaned surface of a 3×3 structure, a 2·31 / 2×2·131 / 2 structure, a 31 / 2×31 / 2 structure, or a 6×6 structure (see FIG. 20).

[0100] Subsequently, as shown in FIG. 21, a gate oxide film 7 is deposited on the upper surface of the surface channel layer 5. The gate o...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

PropertyMeasurementUnit
temperatureaaaaaaaaaa
temperatureaaaaaaaaaa
temperatureaaaaaaaaaa
Login to view more

Abstract

In a method of fabricating a SiC semiconductor device, a surface of a SiC layer (5, 48, 102) is processed into a cleaned surface terminated at Si. An oxide film (7, 49, 105) is formed on the cleaned surface of the SiC layer. The SiC layer with the oxide film is subjected to thermal oxidation at a temperature in a range of 700° C. to 900° C. so that only terminal Si at the cleaned surface of the SiC layer is oxidated and an interface between the oxide film and the SiC layer becomes an SiO2 / SiC cleaned interface.

Description

BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] This invention generally relates to a method of fabricating a semiconductor device having basic portions made of silicon carbide (SiC). This invention specifically relates to a method of fabricating, for example, a SiC MOSFET. [0003] 2. Description of the Related Art [0004] There is a known semiconductor device including a SiC substrate or a 4H—SiC substrate. In the case where an oxide film (an SiO2 film) formed on a SiC substrate, especially a 4H—SiC substrate, is used as a gate oxide film, an interface level density is extremely high so that a channel mobility decreases. It is thought that the high interface level density is caused by impurity such as carbon which remains in an SiO2 / SiC interface between the gate oxide film and the SiC substrate. When the SiC substrate is thermally oxidated to form the gate oxide film, the oxidization causes carbon to remain in the SiO2 / SiC interface as impurity. On the other hand...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(United States)
IPC IPC(8): H01L21/04H01L21/314H01L21/336H01L29/12H01L29/24H01L29/78
CPCH01L21/049H01L29/1608H01L29/7802H01L29/66068H01L29/41766H01L29/7813H01L29/7828
Inventor HISADA, YOSHIYUKIOKUNO, EIICHIHASEGAWA, TAKESHI
Owner HISADA YOSHIYUKI
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products