Prefetch mechanism for use in a system including a host connected to a plurality of memory modules via a serial memory interconnect

a technology of serial memory and prefetch mechanism, which is applied in the field of prefetching data in a serial memory subsystem, can solve the problems of increasing the operating speed of computer system processors and not increasing the relative performance of main system memory at the same ra

Inactive Publication Date: 2005-03-31
ADVANCED MICRO DEVICES INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Although the operating speed of computer system processors continues to increase, the relative performance of the main system memory has not increased at the same rate.

Method used

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  • Prefetch mechanism for use in a system including a host connected to a plurality of memory modules via a serial memory interconnect
  • Prefetch mechanism for use in a system including a host connected to a plurality of memory modules via a serial memory interconnect
  • Prefetch mechanism for use in a system including a host connected to a plurality of memory modules via a serial memory interconnect

Examples

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Embodiment Construction

[0020] Turning now to FIG. 1, a block diagram of one embodiment of a system including a serially connected chain of memory modules is shown. System 50 includes a host 100 coupled to a system memory 125 via a memory link 11A. System 50 may be configured to operate as part of a computing device such as a computer system or server system, for example. System memory 125 includes a memory module 150A coupled to a memory module 150B via a memory link 110B. Memory module 150B is shown coupled to a memory link 110C, which may be coupled to an additional memory module (not shown) as desired to form a serially connected chain of memory modules that is coupled to host 100. It is noted that although two memory modules are shown in the chain, it is contemplated that one or more memory modules may be connected in this manner. It is further noted that components including a reference number followed by a reference letter may be referred to generally by the reference number alone. For example, when...

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Abstract

A system includes a host coupled to a serially connected chain of memory modules. In one embodiment, the host includes a memory controller that may be configured to issue a memory read request for data stored within the memory modules. The memory controller may further request that data be prefetched from the memory modules by encoding prefetch information within the memory read request. The memory controller may also be configured to issue a memory write request to write data to the memory modules and to selectively request that one or more pages of memory within a given one of the memory modules remain open by encoding the prefetch information within the memory write request.

Description

[0001] This application claims the benefit of U.S. Provisional Application No. 60 / 470,078 filed May 13, 2003.BACKGROUND OF THE INVENTION [0002] 1. Field of the Invention [0003] This invention relates to computer system memory and, more particularly, to prefetching data in a serial memory subsystem topology. [0004] 2. Description of the Related Art [0005] Many computer systems employ a main system memory that may be configured dependent upon the needs of an end user. In such systems, a motherboard or system board may include a number of memory expansion sockets. One or more small circuit boards, referred to as memory modules, may be inserted into the sockets as needed to increase the memory capacity of the computer system. Each of the memory modules typically includes multiple memory devices that provide a given amount of memory capacity. The memory devices are usually implemented using some type of dynamic random access memory (DRAM). Some examples of DRAM types include synchronous ...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G06F12/00G06F13/16G06F13/28G11C5/00
CPCG06F12/0215G06F12/0862G06F2212/6022G06F13/4243G06F13/1626G06F13/1684G06F13/4256G06F13/16
Inventor WEBER, FREDERICK D.LA FETRA, ROSS V.MIRANDA, PAUL C.
Owner ADVANCED MICRO DEVICES INC
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