Reducing context memory requirements in a multi-tasking system

a multi-tasking system and context memory technology, applied in computing, instruments, electric digital data processing, etc., can solve the problems of increasing the number of channels, increasing the cost of manufacturing, and all the memory contained on the chip, so as to reduce the context memory requirement of each task

Inactive Publication Date: 2005-10-27
TELOGY NETWORKS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0005] The problems of the prior art are overcome in the preferred embodiment by applying a generic, lossless compression algorithm to each task in a multitasking environment on a processor to reduce the context memory requirement of each task. The algorithm of the pres

Problems solved by technology

A problem with limited memory environments on processors is that all the memory is contained on the chip: the software operating on the chip does not use external memory.
If more memory is added, the chip requires a larger footprint and becomes more costly to manufacture.
For example, in a voice-data channel context, a barrier to in

Method used

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  • Reducing context memory requirements in a multi-tasking system

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Embodiment Construction

[0013] The preferred and alternative exemplary embodiments of the present invention include a channel-context compression algorithm that operates through a hardware engine in a processor having 16-bit data words. However, the algorithm will operate effectively for processors using 32-bit or other sizes of data words. The exemplary encoder is an adaptive packing operation. Referring to FIG. 1, input to the encoder is divided into blocks 10 of four 16-bit words 12 illustrated as samples S1 through S4. The blocks 10 may contain any reasonable number of words as samples, such as six, eight, or ten words. These words 12 are treated as twos-complement integers. Each block 14 is examined to find the word with the maximum number of significant bits. This number of significant bits is called the packing width and each word in the block can be represented with this number of bits. For example, if the word S1 (18) has the largest magnitude in block (16) of −100, then block BN 16 is assigned a ...

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Abstract

A process for reducing the context memory requirements in a processing system is provided by a generic, lossless, compression algorithm applied to multiple tasks or multiple instances running on any type of processor. The process includes dividing data in a task of a multi-tasking system into blocks with each block containing the same number of words. For the data in each task, a word in a block having a maximum number of significant bits is determined, a packing width to the block of said maximum number of significant bits is assigned, and the least significant bits of each word in the block into a packed block of the packing width multiplied by a total number of words in the block is encoded with a lossless compression algorithm. A prefix header at the beginning of each packed block to represent a change in the packing width from the packed block from a packing width of a previous packed block is also provided.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS [0001] None FIELD OF THE INVENTION [0002] The present invention relates generally to reducing the context memory requirements in a multi-tasking system, and more specifically applying a generic, lossless, compression algorithm to multiple tasks running on any type of processor. BACKGROUND OF THE INVENTION [0003] Computer processors that execute multiple software functions (e.g., multi-tasking) using only on-chip memory must be able to operate the functions in a limited memory environment while conforming to size constraints of the chip and cost-effectiveness of manufacturing. While multitasking, a processor is simultaneously running numerous tasks that consume memory. Each task requires a certain amount of memory to hold each task's variables that are unique to itself. A problem with limited memory environments on processors is that all the memory is contained on the chip: the software operating on the chip does not use external memory. If mor...

Claims

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Application Information

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IPC IPC(8): G06F17/50
CPCH03M7/30
Inventor JONES, KENNETH DALE
Owner TELOGY NETWORKS
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