Systems and apparatus for atomic-layer deposition

a technology of atomic layer and apparatus, applied in the field of integrated circuit making, can solve the problems of difficult, if not impossible, for conventional chemical vapor deposition (cvd) systems to provide uniform coverage of trench sidewalls, and achieve the effects of less gas consumption, less gas consumption, and faster pumping of the chamber

Inactive Publication Date: 2006-01-05
MICRON TECH INC
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  • Abstract
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Benefits of technology

[0011] The inner chamber has a smaller volume than the outer chamber and thus consumes less gas during the deposition process than would the outer chamber used alone. Also, the smaller chamber volume allows the exhaust system to pump the chamber more quickly, thus allowing shorter ALD cycles and potentially increasing rates of production.

Problems solved by technology

Conventional chemical-vapor-deposition (CVD) systems suffer from at least two problems.
First, conventional CVD systems generally form non-uniformly thick layers that include microscopic hills and valleys, and thus generally require use of post-deposition planarization or other compensation techniques.
Second, it is difficult, if not impossible, for CVD to provide uniform coverage of trench sidewalls or complete filling of holes and trenches.
However, the present inventors have recognized that the equipment and processes reported as optimal for thin-film head applications suffer from some limitations relative to use in fabricating integrated circuits.
Moreover, the reported equipment uses a larger than desirable reaction chamber, which takes longer to fill up or pump out, and thus prolongs the duration of each deposition cycle.

Method used

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  • Systems and apparatus for atomic-layer deposition
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  • Systems and apparatus for atomic-layer deposition

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[0010] To address these and / or other problems, the present inventor devised new systems, methods, and apparatuses for atomic layer deposition. One exemplary atomic-layer deposition system, well suited for aluminum-oxide depositions in integrated-circuit fabrication, includes an outer chamber, a substrate holder, and a unique gas-distribution fixture. The fixture includes a gas-distribution surface having two sets of holes and a gas-confinement member that forms a wall around the holes. In operation, one set of holes dispenses an aluminum-carrying precursor and the other dispenses an oxidizing agent gas, after the gas-confinement member engages, or otherwise cooperates with the substrate holder to form an inner chamber within the outer chamber.

[0011] The inner chamber has a smaller volume than the outer chamber and thus consumes less gas during the deposition process than would the outer chamber used alone. Also, the smaller chamber volume allows the exhaust system to pump the cham...

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Abstract

The present inventors devised unique atomic-layer deposition systems, methods, and apparatus suitable for aluminum-oxide deposition. One exemplary method entails providing an outer chamber enclosing a substrate, forming an inner chamber within the outer chamber, and introducing an oxidant into the inner chamber, and introducing an aluminum precursor into the inner chamber. The inner chamber has a smaller volume than the outer chamber, which ultimately requires less time to fill and purge and thus promises to reduce cycle times for deposition of materials, such as aluminum oxide.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS [0001] The present application is a divisional of U.S. application Ser. No. 10 / 137,168, filed May 2, 2002, which is incorporated herein by reference in its entirety.TECHNICAL FIELD [0002] This invention concerns methods of making integrated circuits, particularly layer formation techniques, such as chemical-vapor deposition and atomic-layer deposition. BACKGROUND OF INVENTION [0003] Integrated circuits, the key components in thousands of electronic and computer products, are interconnected networks of electrical components fabricated on a common foundation, or substrate. Fabricators generally build these circuits layer by layer, using techniques, such as deposition, doping, masking, and etching, to form and interconnect thousands and even millions of microscopic transistors, resistors, and other electrical components on a silicon substrate, known as a wafer. [0004] One common technique for forming layers in an integrated circuit is called chem...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): C23C16/00C23C16/44C23C16/455
CPCC23C16/4412C23C16/45574C23C16/45565C23C16/45544
Inventor AHN, KIE Y.FORBES, LEONARD
Owner MICRON TECH INC
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