Parallel data processing apparatus

a data processing apparatus and parallel technology, applied in the field of parallel data processing apparatuses, can solve the problems of large proportion of processing elements remaining unused, inefficient simd architecture, and increased data processing speed

Inactive Publication Date: 2008-02-14
RAMBUS INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In addition, users of such systems are demanding that the speed of data processing is increased.
However, the SIMD architecture can be inefficient when a system has to process a large number of relatively small data item groups.
In that case, a large proportion of the processing elements may remain unused while data is being processed for a particular group.

Method used

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Examples

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Embodiment Construction

[0022] The data processing system described below is a graphics data processing system for producing graphics images for display on a screen. However, this embodiment is purely exemplary, and it will be readily apparent that the techniques and architecture described here for processing graphical data are equally applicable to other data types, such as video data. The system is of course applicable to other signal and / or data processing techniques and systems.

[0023] An overview of the system will be given, followed by brief descriptions of the various functional units of the system. A graphics processing method will then be described by way of example, followed by detailed description of the functional units.

Overview

[0024]FIG. 1 is a system level block diagram illustrating a graphics data processing system 3. The system 3 interfaces with a host system (not shown), such as a personal computer or workstation, via an interface 2. Such a system can be provided with an embedded proces...

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PUM

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Abstract

A method of scheduling instruction streams in a SIMD (single instruction multiple data) array of processing elements in which the processing elements are arranged in a plurality of SIMD processing blocks, comprises determining which instruction stream has priority at a particular moment in time, and transferring that determined instruction stream to the SIMD array.

Description

[0001] The present invention relates to parallel data processing apparatus, and in particular to SIMD (single instruction multiple data) processing apparatus. BACKGROUND OF THE INVENTION [0002] Increasingly, data processing systems are required to process large amounts of data. In addition, users of such systems are demanding that the speed of data processing is increased. One particular example of the need for high speed processing of massive amounts of data is in the computer graphics field. In computer graphics, large amounts of data are produced that relate to, for example, geometry, texture, and colour of objects and shapes to be displayed on a screen. Users of computer graphics are increasingly demanding more lifelike and faster graphical displays which increases the amount of data to be processed and increases the speed at which the data must be processed. [0003] A previously proposed processing architecture for processing large amounts of data in a computer system uses a Sin...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G06F15/80G06F7/52G06F15/16G06F9/38G06F9/46G06F11/00G06F15/00G06F15/177G06F15/76
CPCG06F9/3001G06F9/3004G06F9/30087G06F9/30101G06F9/3838G06T1/20G06F9/3885G06F9/3887G06F15/8007G06F15/8015G06F9/3851
Inventor STUTTARD, DAVEWILLIAMS, DAVEO'DEA, EAMONFAULDS, GORDONRHOADES, JOHNCAMERON, KENATKIN, PHILWINSER, PAULDAVID, RUSSELLMCCONNELL, RAYDAY, TIMGREER, TREY
Owner RAMBUS INC
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