Method of fabricating metal-insulator-metal (MIM) device with stable data retention
a metal-insulator metal and data retention technology, applied in the field of electronic devices, can solve the problems of memory device significantly reduced conductivity, memory device undesirably losing its programmed state, memory device formed to be subjected to high temperatures
Active Publication Date: 2008-06-05
MONTEREY RES LLC
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Problems solved by technology
While the above described device is effective in operation, it has been found that over a period of time, the conductivity of the memory device can be significantly reduced, so that the memory device undesirably loses its programmed state.
Furthermore, it is typical that the formed memory device is subjected to high temperatures during subsequent semiconductor processing steps.
In particular, depending on the material chosen, the active layer can be subject to degradation in performance due to the application thereto of the normal high temperatures involved in subsequent semiconductor processing steps.
Method used
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[0020]Reference is now made in detail to a specific embodiment of the present invention which illustrates the best mode presently contemplated by the inventors for practicing the invention.
[0021]With initial reference to FIG. 3, the structure thus far formed on a semiconductor wafer includes a p+ semiconductor substrate 70 having n+ regions 72, 74, 76, 78 formed therein. In contact with the respective n+ regions 72, 74, 76, 78 are conductive W plugs 80, 82, 84, 86 which extend through SiO2 layer 88, SiN layer 90, and SiO2 layer 92. Overlying the SiO2 layer 92 and the tops of the W plugs 80, 82, 84, 86 is a SiN layer 94. The n+ regions 72, 74, along with gate and gate oxide 96, form a transistor T0, and the n+ regions 76, 78, along with gate and gate oxide 98, form a transistor T1. The plug 80 contacts the n+ source region 72 of the transistor T0, while the plug 82 contacts the n+ drain region 74 of the transistor T0. The plug 84 contacts the n+ drain region 76 of the transistor T1, ...
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Abstract
In the method of fabricating a metal-insulator-metal (MIM) device, a first electrode of α-Ta is provided. The Ta of the first electrode is oxidized to form a Ta2O5 layer on the first electrode. A second electrode of β-Ta is provided on the Ta2O5 layer. Such a device exhibits strong data retention, along with resistance to performance degradation under high temperatures.
Description
BACKGROUND OF THE INVENTION[0001]1. Technical Field[0002]This invention relates generally to electronic devices, and more particularly, to a method of fabricating a Metal-Insulator-Metal (MIM) device.[0003]2. Background Art[0004]FIG. 1 illustrates a two-terminal metal-insulator-metal (MIM) resistive memory device 30. The memory device 30 includes a metal, for example copper electrode 32, an active layer 34 of for example copper oxide on and in contact with the electrode 32, and a metal, for example copper electrode 36 on and in contact with the active layer 34. As an example of the operational characteristics of such a device 30, with reference to FIG. 2, initially, assuming that the memory device 30 is unprogrammed, in order to program the memory device 30, ground is applied to the electrode 32, while a positive voltage is applied to electrode 36, so that an electrical potential Vpg (the “programming” electrical potential) is applied across the memory device 30 from a higher to a l...
Claims
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Patent Timeline
Login to View More IPC IPC(8): H01S4/00
CPCH01L45/1253H01L45/1633H01L45/1675Y10T29/49002H01L45/04H01L45/1233H01L45/146H01L27/2436H10B63/30H10N70/20H10N70/841H10N70/028H10N70/826H10N70/8833H10N70/063
Inventor AVANZINO, STEVENHADDAD, SAMEERCHEN, ANWU, YI-CHING JEANPANGRLE, SUZETTE K.SHIELDS, JEFFREY A.
Owner MONTEREY RES LLC