Electronic apparatus and manufacturing method thereof

Abstract

There are provided a plurality of semiconductor apparatuses judged as good items in electrical and functional inspections while having internal connection terminals disposed on electrode pads of semiconductor chips, resin layers which are disposed on surfaces of the semiconductor chips in which the electrode pads are formed and expose the internal connection terminals, and wiring patterns which are disposed on the resin layers and are connected to the internal connection terminals, a wiring substrate on which the plurality of semiconductor apparatuses are stepwise stacked, the wiring substrate electrically connected to the plurality of semiconductor apparatuses, and a sealing resin with which the plurality of semiconductor apparatuses are sealed.

Description

TECHNICAL FIELD[0001]The present disclosure relates to an electronic apparatus and a manufacturing method thereof, and relates to an electronic apparatus comprising a plurality of semiconductor chips stacked on a wiring substrate and a sealing resin with which the plurality of semiconductor chips are sealed, and a manufacturing method of the electronic apparatus.RELATED ART[0002]FIG. 1 is a sectional diagram of a related-art electronic apparatus.[0003]Referring to FIG. 1, a related-art electronic component 200 has a wiring substrate 201, semiconductor chips 202 to 204, a sealing resin 205 and external connection terminals 206.[0004]The wiring substrate 201 has a core substrate 211, through vias 212, pads 213, 216, and solder resists 214, 217.[0005]The core substrate 211 is a substrate formed in a plate shape and has through holes 219. The through vias 212 are disposed in the through holes 219. The upper end of the through via 212 is connected to the pad 213 and the lower end of the ...

AI Technical Summary

Benefits of technology

[0020]Exemplary embodiments of the present invention provide an electronic apparatus capable of improving a yield of the electronic apparatus by stacking semiconductor chips on a wiring substrate after previously performing WLP packaging processing of each of the semiconductor chips and forming a KGD before a sealing resin formation step, and a manufacturing method of the electronic apparatus.

[0026]According to the invention, a plurality of semiconductor apparatuses (KGD (Known Good Die)) judged as good items in electrical and functional inspections made before being stacked on a wiring substrate while having resin layers which are disposed surfaces of semiconductor chips in which electrode pads are formed and expose the internal connection terminals and wiring patterns which are disposed on the resin layers and are connected to the internal connection terminals are stacked on the wiring substrate and thereby, a yield of an electronic apparatus can be improved.

[0027]Also, since a high pressure or a high temperature, etc. at the time of forming the wiring pattern and the resin layer is applied to the semiconductor chips disposed in the plurality of semiconductor apparatuses judged as the good items before a sealing resin is formed. Consequently, the semiconductor chips disposed in the plurality of semiconductor apparatuses become resistant to breakage by influence of a pressure or a temperature, etc. at the time of forming the sealing resin (influence by a packaging processing process), so that a yield of the electronic apparatus can be improved.

[0034]According to the invention, electrical and functional inspections of a plurality of semiconductor apparatuses having resin layers which are disposed on surfaces of semiconductor chips in which electrode pads are formed and expose internal connection terminals and wiring patterns which are disposed on the resin layers and are connected to the internal connection terminals are made and the plurality of semiconductor apparatuses judged as good items are acquired and the plurality of semiconductor apparatuses (KGD (Known Good Die)) judged as the good items are stacked on the wiring substrate and then electrical connection between the wiring substrate and the stacked a plurality of semiconductor apparatuses are made and thereafter the plurality of semiconductor apparatuses are sealed with a sealing resin and thereby, a yield of an electronic apparatus can be improved.

[0035]Also, since a high pressure or a high temperature, etc. at the time of forming the wiring pattern and the resin layer is applied to the semiconductor chips disposed in the plurality of semiconductor apparatuses judged as the good items before the sealing resin is formed. Consequently, the semiconductor chips disposed in the plurality of semiconductor apparatuses become resistant to breakage by influence of a pressure or a temperature, etc. at the time of forming the sealing resin (influence by a packaging processing process), so that a yield of the electronic apparatus can be improved.

[0036]According to the invention, a yield of an electronic apparatus can be improved by preventing breakage of a semiconductor chip in a packaging processing process including a sealing resin formation step.

Problems solved by technology

However, in the related-art electronic apparatus 200, the semiconductor chips 202 to 204 which are not a KGD (Known Good Die) are stacked on the wiring substrate 201, so that there was a problem that a yield of the electronic apparatus 200 reduces.

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