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Method for Providing Wideband Electrostatic Discharge Protection and Circuits Obtained Therewith

a wideband electrostatic discharge and protection technology, applied in the field of integrated electronic circuits, can solve the problems of premature failure of es-desd design, failure of semiconductor devices, and unplanned large voltage and/or current electrostatic discharge pulses applied

Active Publication Date: 2011-03-03
INTERUNIVERSITAIR MICRO ELECTRONICS CENT (IMEC VZW)
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0013]The trigger voltage of the ESD device of the first section in distributed circuit is selected to be higher, in absolute value, than the trigger voltage of at least one of the corresponding ESD devic

Problems solved by technology

This electric charge may result in undesired large voltage and / or current Electro Static Discharge (ESD) pulses being applied to the electronic device when discharging through this semiconductor device e.g. via its input terminal or via its power supply lines.
These large pulses can cause failure of the semiconductor device for various reasons, such as but not limited to, dielectric breakdown, junction breakdown, breakage of conductors, and / or heating of the device.
However, such ES-DESD design fails prematurely since the ESD efficiency of the ESD protection element associated with a section i of the transmission line decreases when this section i is positioned further down the transmission line.

Method used

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  • Method for Providing Wideband Electrostatic Discharge Protection and Circuits Obtained Therewith
  • Method for Providing Wideband Electrostatic Discharge Protection and Circuits Obtained Therewith
  • Method for Providing Wideband Electrostatic Discharge Protection and Circuits Obtained Therewith

Examples

Experimental program
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Embodiment Construction

b>21, b) input and output matching S11 and S22, respectively)

[0025]FIG. 9 shows TLP-IV measurements for design with prior art ES-DESD and with distributed ESD protection according to an embodiment: Vss stressed positive versus RF-IN.

[0026]FIG. 10 shows TLP-IV measurements for design with prior art ES-DESD and with distributed ESD protection according to an embodiment: RF-IN stressed positive versus VDD.

[0027]FIG. 11 shows TLP TLP-IV measurements for design with prior art ES-DESD and with distributed ESD protection according to an embodiment: RF-IN stressed positive versus VSS.

[0028]FIG. 12 shows a schematic of an integrated electronic circuit with distributed ESD protection according to an embodiment.

[0029]FIG. 13 shows a flowchart illustrating the ESD design methodology disclosed herein.

DETAILED DESCRIPTION

[0030]The drawings described are only schematic and are non-limiting. In the drawings, the size of some of the elements may be exaggerated and not drawn on scale for illustrative...

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PUM

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Abstract

An distributed electronic circuit (1), such as a transmission line or distributed amplifier, is disclosed comprising an input terminal (2), an output terminal (3), power supply lines (4,5), a sequence of sections (61, 62, 63, 64, 65), between the input terminal (2) and the output terminal (3), arranged to transfer an electrical signal from one section to another section; each section (61, 62, 63, 64, 65) comprising at least one Electro Static Discharge (ESD) protection component (9) configured to, upon occurrence of an ESD event, convey corresponding ESD currents to a power supply line (4, 5); and wherein the ESD components (9) of the respective sections (61, 62, 63, 64, 65) are selected such that, upon occurrence of an ESD event, at least one subsequent section (62, 63, 64, 65) is triggered before the first section (61).

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]This application is a non-provisional application claiming priority to U.S. Patent App. No. 61 / 237,501 filed on Aug. 27, 2009, which is included herein by reference for all purposes.FIELD[0002]The present disclosure relates to integrated electronic circuits, more specific to integrated electronic circuits containing a sequence of stages, whereby Electro Static Discharge (ESD) protection is provided at each individual stage.STATE OF THE ART[0003]During manufacturing or handling of electronic devices, such as integrated electronic circuits, electric charge may accumulate on tools, persons and / or the electronic device itself. This electric charge may result in undesired large voltage and / or current Electro Static Discharge (ESD) pulses being applied to the electronic device when discharging through this semiconductor device e.g. via its input terminal or via its power supply lines. These large pulses can cause failure of the semiconductor de...

Claims

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Application Information

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IPC IPC(8): H02H9/00
CPCH03F3/607H03F1/523
Inventor THIJS, STEVENLINTEN, DIMITRI
Owner INTERUNIVERSITAIR MICRO ELECTRONICS CENT (IMEC VZW)