Manufacturing of FET Devices Having Lightly Doped Drain and Source Regions

Abstract

Embodiments described herein generally relate to methods of manufacturing n-type lightly doped drains and p-type lightly doped drains. In one method, a photoresist mask is used to etch a transistor, and the mask is left in place (i.e., reused) to protect other devices and poly while a high energy implantation is performed in alignment with the photoresist mask, such that the implantation is adjacent to the etched transistor. One example of a high energy implantation is forming lightly doped source and drain regions. This technique of reusing a photoresist mask can be employed for creating lightly doped source and drain regions of one conductivity followed by using the technique a second time to create lightly doped source and drain regions of the complementary conductivity type. This may prevent use of at least one hard mask during manufacturing.

Description

BACKGROUND[0001]1. Technical Field[0002]The embodiments described herein generally relate to the manufacturing of integrated circuits.[0003]2. Background[0004]A non-volatile memory, such as Flash memory, retains stored data even if power to the memory is removed. A non-volatile memory cell stores data, for example, by storing electrical charge in an electrically isolated floating gate or in a charge-trapping layer underlying a control gate of a field-effect transistor (FET). The stored electrical charge Controls the threshold of the FET, thereby controlling the memory state of the cell.[0005]It is common to monolithically incorporate multiple types of field-effect devices on the same substrate as memory cells. Those non-memory devices perform, for example, decoding, charge-pumping, and other functions related to memory operations. The substrate may also include non-memory devices to provide functions that are not related to memory operations. Such non-memory devices incorporated on ...

AI Technical Summary

Benefits of technology

The patent describes a method that uses a photoresist mask to etch a transistor and then reuses the mask to protect other devices while performing a high energy implantation in alignment with the mask. This results in the formation of lightly doped source and drain regions. The technical effect is a cost-effective and efficient way to create complex semiconductor devices without the need for multiple hard masks.

Problems solved by technology

Integrating the processing of memory cells, such as a split-gate memory cell, with the processing of one or more types of non-memory transistors on the same substrate is challenging as each requires different fabrication parameters.

Additional types of integrated circuits, such as analog devices, pose manufacturing challenges.

As with the memory cells, these analog devices pose fabrication challenges due to the different fabrication parameters.

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