Preventing programming errors from occurring when programming flash memory cells

Abstract

Mis-programming of MSB data in flash memory is prevented by using ECC decoding logic on the flash die that error corrects the LSB values prior to the LSB values being used in conjunction with the MSB values to determine the proper reference voltage ranges. Error correcting the LSB page data prior to using it in combination with the MSB page data to determine the reference voltage ranges ensures that the reference voltage ranges will be properly determined and programmed into the flash cells.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]This nonprovisional application claims priority to provisional application Ser. No. 61 / 918,778, filed on Dec. 20, 2013, and entitled “PREVENTING PROGRAMMING ERRORS FROM OCCURRING WHEN PROGRAMMING FLASH MEMORY CELLS,” which is incorporated by reference herein in its entirety.TECHNICAL FIELD OF INVENTION[0002]The invention relates generally to flash memory and, more specifically, to preventing programming errors from occurring when programming flash memory cells.BACKGROUND OF THE INVENTION[0003]A flash memory is a non-volatile electrically erasable data storage device that evolved from electrically erasable programmable read-only memory (EEPROM). The two main types of flash memory are named after the logic gates that their storage cells resemble: NAND and NOR. NAND flash memory is commonly used in solid-state drives, which are supplanting magnetic disk drives in many applications. A NAND flash memory is commonly organized as multiple blocks...

AI Technical Summary

Benefits of technology

The invention relates to a data storage system and a flash memory IC for use in the system. The system includes a host system and a solid state drive (SSD) interfaced with each other. The SSD controller includes a tier 1 error-correcting ECC encoder / decoder and a tier 2 ECC encoder / decoder. The NVM includes a first flash memory with a plurality of flash memory cells, reference voltage range determination logic, and a tier 2 ECC decoder. The SSD controller receives write data from the host system and encodes the data using tier 1 and tier 2 ECC encoding. The flash memory IC receives the encoded data and decodes it using the tier 2 ECC decoder. The decoded data is then used to determine reference voltage ranges for the flash memory cells. The technical effect of the invention is to prevent programming errors when programming flash memory and to improve the reliability and performance of the data storage system.

Problems solved by technology

Determining or detecting stored data values using controller-provided reference voltages is hampered by undesirable physical non-uniformity across cells of a device that are inevitably introduced by the fabrication process, as such non-uniformity results in the reference voltages of different cells that store the same bit value being significantly different from each other.

The detection is further hampered by target or optimal reference voltages changing over time due to adverse effects of changes in temperature, interference from programming neighboring cells, and numerous erase-program cycles.

The use of error-correcting codes (ECCs) can improve BER to some extent, but the effectiveness of ECCs diminishes as improved fabrication processes result in smaller cell features.

As flash memory technology improves, the sizes of the flash dies scale down, which results in the distance between neighboring flash cells becoming smaller.

Because of the nearness of neighboring flash cells to one another, the programming of one flash cell can affect the charges stored on nearby flash cells, which contributes to the potentially noisy and unreliable nature of flash cells.

Consequently, there can be errors in the LSB page data read out of the corresponding flash cells.

Because the LSB page data read out of the flash cells is used in combination with the MSB page data to determine the target reference voltage ranges for the corresponding cells, such errors will typically cause the target reference voltage ranges to be incorrectly determined.

This can cause the flash cells to be mis-programmed to improper reference voltage ranges when performing MSB page programming.

This, in turn, can significantly degrade the error correction performance of soft-decision decoding, such as LDPC decoding.

As can be seen from the above, if the LSB values that are read from the flash memory cells are inaccurate, which is possible for the reasons described above, then the reference voltage ranges will likely be mis-programmed.

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