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Sar-type analog-digital converter using residue integration

a technology of analog-digital converters and residues, applied in the field of successful approximation register analog-digital converters using residue integration, can solve the problems of high-resolution adc implementation difficulties, and achieve the effect of low power consumption

Active Publication Date: 2019-03-28
POSTECH ACAD IND FOUND
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The patent describes a way to make a type of analog-to-digital converter that can work with low power and high precision. It solves a problem that can occur when there is a lot of electrical activity in the converter. Overall, this invention helps to make better and more efficient digital tools.

Problems solved by technology

However, there are difficulties in implementing a high-resolution ADC due to noise of the comparator applied to the SAR-type ADC.

Method used

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  • Sar-type analog-digital converter using residue integration
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  • Sar-type analog-digital converter using residue integration

Examples

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Embodiment Construction

[0017]Hereafter, exemplary embodiments will be described below in detail with reference to the accompanying drawings.

[0018]FIG. 1 is a block diagram illustrating an SAR-type ADC using a residual voltage amplifier according to an embodiment of the present invention. As illustrated in FIG. 1, the SAR-type ADC 100 includes a coarse / fine SAR conversion unit 110, a residue integration unit 120 and a digital signal output unit 130.

[0019]The coarse / fine SAR conversion unit 110 receives an analog input voltage VIN and converts the received voltage into a most-significant-bit digital signal (MSBs) (for example, D7:0) in a coarse SAR conversion mode. The coarse / fine SAR conversion unit 110 receives a final residual voltage VO[32] as a feedback voltage and converts the received voltage into a least-significant-bit digital signal (LSBs) (for example, F7:0) in a fine SAR conversion mode. Therefore, the digital signal F7:0 correspond to a digital signal obtained by converting an output voltage va...

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Abstract

The present invention relates to a successive approximation register (SAR)-type analog-digital converter (ADC), which can amplify a residual voltage without a non-linearity problem caused by an output voltage of a residual voltage amplifier, thereby performing high-resolution analog-digital conversion at low power consumption.The SAR-type ADC may include: a coarse / fine SAR conversion unit configured to receive an analog input voltage and convert the received voltage into an MSB digital signal in a coarse SAR conversion mode, and receive a feedback voltage and convert the received voltage into an LSB digital signal in a fine SAR conversion mode; and a residue integration unit configured to repeatedly amplify a residual voltage with a predetermined gain by a predetermined number of times and output the amplified voltage as a final target multiple, the residual voltage corresponding to a voltage difference between the analog input voltage and an analog voltage obtained by converting the digital signal into an analog signal.

Description

BACKGROUND1. Technical Field[0001]The present disclosure relates to a successive approximation register (SAR)-type analog-digital converter (ADC) using residue integration, and more particularly, to an SAR-type ADC using residue integration, which can amplify a residual voltage without a non-linearity problem caused by an output voltage of a residual voltage amplifier, thereby performing high-resolution analog-digital conversion at low power consumption.2. Related Art[0002]An analog-digital converter (ADC) is a device that samples an analog signal and converts the sampled analog signal into a digital code or digital signal. Examples of the ADC may include a successive approximation register (SAR)-type ADC which includes an SAR to combine a digital code while sequentially increasing or decreasing the digital code from the most significant bit (MSB), and approximates the combined result to an analog input signal by comparing the combined result to the analog input signal. For this ope...

Claims

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Application Information

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IPC IPC(8): H03M3/00
CPCH03M3/464H03M3/46H03M1/164H03M1/145H03M1/38
Inventor SIM, JAE YOONCHOI, SEUNGNAM
Owner POSTECH ACAD IND FOUND