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Substrate structure, semiconductor package structure including the same, and semiconductor process for manufacturing the same

a semiconductor and package technology, applied in semiconductor devices, semiconductor/solid-state device details, electrical devices, etc., can solve the problems of high cost, incompatibility and complexity, and the inability to meet the requirements of semiconductor manufacturing,

Active Publication Date: 2019-05-02
ADVANCED SEMICON ENG INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

This patent describes a substrate structure and a semiconductor package structure that includes a dielectric layer, first and second circuit layers, and at least one conductive pillar. The conductive pillar is tapered downwardly and disposed on one of the pads of the second circuit layer. The substrate structure also includes a semiconductor die that is electrically connected to the conductive pillar. An encapsulant is disposed between the substrate structure and the semiconductor die. The patent also describes a process for making the substrate structure and the semiconductor package structure. The technical effects of this patent include enhanced performance and reliability of semiconductor devices that utilize conductive pillars.

Problems solved by technology

When the materials of the electronic device are changed, the settings or parameters of production equipment and the manufacturing methods may be modified accordingly, which can be complicated and expensive as compared to adjusting the structural design thereof.
However, an input / output (I / O) count and a total thickness of such an electronic device are issues of concern.

Method used

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  • Substrate structure, semiconductor package structure including the same, and semiconductor process for manufacturing the same
  • Substrate structure, semiconductor package structure including the same, and semiconductor process for manufacturing the same
  • Substrate structure, semiconductor package structure including the same, and semiconductor process for manufacturing the same

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Embodiment Construction

[0034]Common reference numerals are used throughout the drawings and the detailed description to indicate the same or similar components. Embodiments of the present disclosure will be readily understood from the following detailed description taken in conjunction with the accompanying drawings.

[0035]The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to explain certain aspects of the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed or disposed in direct contact, and may also include embodiments in which additional features may be formed or disposed between the first and second features, such that the fir...

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PUM

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Abstract

A substrate structure includes a dielectric layer, a first circuit layer, a second circuit layer and at least one conductive pillar. The dielectric layer has a first surface and a second surface opposite to the first surface. The first circuit layer is disposed adjacent to the first surface of the dielectric layer. The second circuit layer is disposed adjacent to the second surface of the dielectric layer and electrically connected to the first circuit layer. The second circuit layer includes a plurality of pads and at least one trace disposed between two adjacent pads of the plurality of pads. The at least one conductive pillar is tapered toward the second circuit layer and disposed on one of the pads. A portion of the second surface of the dielectric layer is exposed from the second surface layer.

Description

BACKGROUND1. Field of the Disclosure[0001]The present disclosure relates to a substrate structure, a semiconductor package structure and a manufacturing method, and to a substrate structure including at least one tapered conductive pillar, a semiconductor package structure including the substrate structure, and a method for manufacturing the substrate structure.2. Description of the Related Art[0002]In an electronic device, functionality improvement and size reduction can be achieved by changing the materials thereof, or by changing the structural design thereof. When the materials of the electronic device are changed, the settings or parameters of production equipment and the manufacturing methods may be modified accordingly, which can be complicated and expensive as compared to adjusting the structural design thereof. An efficient way for improving functionality and reducing size of the electronic device is achieved by a structural design with a reduced line width / line space (L / S)...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L23/498H01L23/31H01L23/00H01L21/48H01L21/56
CPCH01L23/49811H01L23/49822H01L23/3157H01L23/3107H01L2224/81801H01L21/4857H01L24/81H01L21/563H01L2224/16227H01L24/16H01L23/3114H01L21/6835H01L2221/68345H01L2221/68359H01L2224/13019H01L2224/81193H01L2224/11462H01L2224/11472H01L2224/81005H01L24/13H01L2224/13017H01L2224/16058H01L2224/16059H01L2224/16238H01L23/49816H01L2224/13147H01L2924/00014
Inventor LU, WEN-LONG
Owner ADVANCED SEMICON ENG INC