Methods and apparatus for localized processing within multicore neural networks

Abstract

Methods and apparatus for localized processing within multicore neural networks. Unlike existing solutions that rely on commodity software and hardware to perform “brute force” large scale neural network processing the various techniques described herein map and partition a neural network into the hardware limitations of a target platform. Specifically, the various implementations described herein synergistically leverage localization, sparsity, and distributed scheduling, to enable neural network processing within embedded hardware applications. As described herein, hardware-aware mapping / partitioning enhances neural network performance by e.g., avoiding pin-limited memory accesses, processing data in compressed formats / skipping unnecessary operations, and decoupling scheduling between cores.

Description

PRIORITY[0001]This application claims the benefit of priority to U.S. Provisional Patent Application Ser. No. 63 / 050,090 filed Jul. 9, 2020 and entitled “METHODS AND APPARATUS FOR LOCALIZED PROCESSING WITHIN MULTICORE NEURAL NETWORKS”, which is incorporated herein by reference in its entirety.RELATED APPLICATIONS[0002]This application is related to U.S. patent application Ser. No. ______, filed and entitled “METHODS AND APPARATUS FOR MATRIX AND VECTOR STORAGE AND OPERATIONS”, and U.S. patent application Ser. No. ______, filed and entitled “METHODS AND APPARATUS FOR THREAD-BASED SCHEDULING IN MULTICORE NEURAL NETWORKS”, each of which are incorporated herein by reference in its entirety.STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT[0003]This invention was made with Government support under Agreement No. N00014-19-9-0003, awarded by ONR. The Government has certain rights in the invention.COPYRIGHT[0004]A portion of the disclosure of this patent document contains mater...

AI Technical Summary

Benefits of technology

The present patent is about methods and devices for processing neural networks in multicore network processors. The technical effects of this patent include improved performance and efficiency in processing neural networks across multiple cores, as well as improved sparsity and localization of neural network processing. These improvements can lead to faster and more accurate results in neural network processing.

Problems solved by technology

Unfortunately, such implementations suffer from many inefficiencies due to e.g., hardware limitations (e.g., physical connectivity), compiler design, and / or instruction scheduling.

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