Unlock instant, AI-driven research and patent intelligence for your innovation.

Method for Improving HDP Filling Defects through STI Etching Process

a technology of sti etching and defects, applied in the field of semiconductors, can solve the problem that the control method cannot meet the demand of product delivery, and achieve the effect of improving hdp filling defects and preventing voids

Active Publication Date: 2022-05-12
SHANGHAI HUALI MICROELECTRONICS CORP
View PDF0 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present patent text describes a method for improving the filling of holes in a semiconductor device using a process called STI etching. This method has two steps. The first step is to etch both the pixel and logical areas at the same time. The second step is to cover the pixel areas with a protective material, and then continue etching the logical areas. This method also improves the uniformity of the depth of the etching, which prevents voids from appearing during the filling of the holes. Overall, this method helps to improve the quality of the semiconductor device.

Problems solved by technology

However, with the increase of product input and the demand of machine maintenance, such control method can no longer meet the demand of product delivery.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method for Improving HDP Filling Defects through STI Etching Process
  • Method for Improving HDP Filling Defects through STI Etching Process
  • Method for Improving HDP Filling Defects through STI Etching Process

Examples

Experimental program
Comparison scheme
Effect test

embodiment 1

[0032]The present disclosure provides a method for improving HDP filling defects through an STI etching process. Referring to FIG. 6, it illustrates a flowchart of the method for improving HDP filling defects through the STI etching process provided by embodiment 1 of the present disclosure. The method at least includes the following steps:

[0033]In step 1, a wafer is provided. The wafer is uniformly distributed with pixel areas and logical areas.

[0034]In step 2, a surface of the wafer is divided into a first quadrant, a second quadrant, a third quadrant and a fourth quadrant by taking a circle center of the wafer as an origin of a rectangular coordinate system. Referring to FIG. 4a, reference signs 1, 2, 3 and 4 on the surface of the wafer respectively represent the first quadrant, the second quadrant, the third quadrant and the fourth quadrant. Since pixel areas and logical areas are uniformly distributed on the wafer, the pixel areas and the logical areas are distributed in the fi...

embodiment 2

[0040]The present disclosure further provides a method for improving HDP filling defects through an STI etching process. The method at least includes the following steps:

[0041]In step 1, a wafer is provided. The wafer is uniformly distributed with pixel areas and logical areas.

[0042]In step 2, a surface of the wafer is divided into a first quadrant, a second quadrant, a third quadrant and a fourth quadrant by taking a circle center of the wafer as an origin of a rectangular coordinate system. The operation principles of step 1 and step 2 in the present embodiment are the same as the operation principles of step 1 and step 2 in embodiment 1 of the present disclosure.

[0043]In step 3, the wafer is placed on an electrostatic chuck of an etching chamber of an etching machine, and the second quadrant of the wafer is enabled to face to a cantilever of the etching machine. Referring to FIG. 5a, it illustrates a top schematic view when the second quadrant of the wafer is enabled to face to t...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

PropertyMeasurementUnit
areasaaaaaaaaaa
depthaaaaaaaaaa
depthsaaaaaaaaaa
Login to View More

Abstract

The present disclosure provides a method for improving HDP filling defects through an STI etching process, comprises a wafer uniformly distributed with pixel areas and logical areas, and dividing the wafer into quadrants 1 to 4; placing the second quadrants in an etching chamber in a manner of facing to a cantilever of an etching machine; etching the wafer to form STI areas with the same depth in the pixel areas and the logical areas of the quadrants 1 to 4; removing the wafer from the etching machine and covering the STI areas of the pixel areas with a photoresist; placing the wafer on an electrostatic chuck of the etching chamber again, and enabling any quadrant except the second quadrant to face to the cantilever; continuously etching the STI areas of the logical areas of the quadrants 1 to 4 to form deep STI areas.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]This application claims priority to Chinese Patent Application No. CN 202011252721.3, filed on Nov. 11, 2020, and entitled “Method for Improving HDP Filling Defects Through STI Etching Process”, the disclosure of which is incorporated herein by reference in its entirety.TECHNICAL FIELD[0002]The present application relates to the technical field of semiconductors, in particular to a method for improving HDP filling defects through the STI etching process.BACKGROUND[0003]At present, in the process of CIS products, due to the process requirements, the Shallow-Trench Isolation (STI) depths of pixel areas and logical areas are different, and etching is performed in two steps; the first step is to simultaneously etch the STI areas of the pixel areas and the logical areas; the second step is to cover the pixel areas with a photoresist, and then continuously etch the STI areas of the logical areas. Since the STI areas in the logical areas are dee...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(United States)
IPC IPC(8): H01L21/762H01L21/768
CPCH01L21/76224H01L21/76802H01L27/14683H01L27/1463H01L21/76229
Inventor WEI, ZHENGYINGFAN, XUEDONGWU, ZHIYONG
Owner SHANGHAI HUALI MICROELECTRONICS CORP