Sizer for interactive computer system configuration
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Turning to FIG. 1, illustrated is a typical computer system S in which the sizer according to the invention can be run. The computer system S in the illustrated embodiment is a PCI bus based machine, having a peripheral component interconnect (PCI) bus 10. The PCI bus 10 is controlled by PCI controller circuitry located within a memory / accelerated graphics port (AGP) / PCI controller 14. This controller 14 (the "host bridge") couples the PCI bus 10 to a processor 32 and a memory subsystem 20.
The host bridge 14 in the disclosed embodiment is a 440LX Integrated Circuit by Intel Corporation, also known as the PCI AGP Controller (PAC). The processor 32 is preferably a Pentium II. The processor 32 could be replaced with a different processor other than the Pentium II without detracting from the spirit of the invention.
The PCI bus 10 couples a variety of devices that generally take advantage of a high speed data path. This includes a network interface controller (NIC) 42, which preferably s...
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