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Method of manufacturing semiconductor device

a manufacturing method and semiconductor technology, applied in the direction of semiconductor devices, electrical appliances, transistors, etc., can solve the problems of increasing the device, reducing the drive current, and not being able to neglect the problem

Active Publication Date: 2005-06-21
KIOXIA CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present invention provides methods for manufacturing semiconductor devices with different gate electrodes for different elements on the semiconductor substrate. The methods involve forming gate insulating film on the substrate, selectively etching the film to expose the substrate in different regions, and then sequentially depositing and patterning conductive material films to create the desired gate electrodes. The technical effects of the invention include improved control over the formation of the gate electrodes and improved performance of the semiconductor device.

Problems solved by technology

With progress in the miniaturization of the gate insulating film, the decrease of the drive current brings about a problem that cannot be neglected.
In this case, however, the short channel effect of the MOSFET device is increased, which makes it impossible to achieve a fine device.
Further, if the second gate insulating film is formed under high temperatures not lower than 600° C., the exposed second metal gate tends to be deteriorated.

Method used

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  • Method of manufacturing semiconductor device
  • Method of manufacturing semiconductor device
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Examples

Experimental program
Comparison scheme
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first embodiment

(First Embodiment)

(First Step)

[0049]A gate insulating film is formed on a semiconductor substrate having first and second element regions. On the entire surface of this gate insulating film, a mask having an etching selective ratio to the gate insulating film is formed. After that, this mask is selectively etched to form an opening for exposing that portion of the gate insulating film, which is positioned in the first element region.

[0050]The first and second element regions are isolated by, e.g., a shallow trench type element isolation region formed in the semiconductor substrate.

[0051]The gate insulating film is made of, e.g., a silicate or high-dielectric-constant insulating material. Especially when the gate insulating film is formed by a high-dielectric-constant insulating material, the film thickness can be increased, so a highly reliable semiconductor device can be manufactured by suppressing or preventing a gate leakage current. Examples of this high-dielectric-constant insu...

second embodiment

(Second Embodiment)

(First Step)

[0060]A plurality of gate trenches are formed in an interlayer insulating film on a semiconductor substrate having first and second element regions such that those portions of the surface of the semiconductor substrate in which the element regions are positioned are exposed in the bottoms of these trenches. Subsequently, a gate insulting film is formed on the entire surface including the gate trenches. On the entire surface of this gate insulating film, a mask having an etching selectivity to the gate insulating film is formed. After that, this mask is selectively etched to form an opening for exposing the gate insulating film in the gate trench positioned in the first element region.

[0061]The first and second element regions are isolated by, e.g., a shallow trench type element isolation region formed in the semiconductor substrate.

[0062]A silicon oxide film, for example, can be used as the interlayer insulating film.

[0063]The same materials as explain...

third embodiment

(Third Embodiment)

(First Step)

[0073]A plurality of gate trenches are formed in an interlayer insulating film on a semiconductor substrate having first and second element regions such that those portions of the surface of the semiconductor substrate in which the element regions are positioned are exposed in the bottoms of these trenches. Subsequently, a gate insulting film is formed on the entire surface including the gate trenches. On the gate insulating film in each gate trench, a mask having an etching selective ratio to the gate insulating film is selectively formed. That is, the mask is buried in each gate trench.

[0074]The first and second element regions are isolated by, e.g., a thin trench type element isolation region formed in the semiconductor substrate.

[0075]A silicon oxide film, for example, can be used as the interlayer insulating film.

[0076]The same materials as explained in the first embodiment can be used as the gate insulating film and mask.

[0077]The selective format...

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Abstract

A method of manufacturing a semiconductor device comprises forming a gate insulating film on a semiconductor substrate having first and second element regions, forming a mask on the entire surface of the gate insulating film, selectively etching the mask to form an opening for exposing a portion of the gate insulating film, forming a first conductive material film on the entire surface of the mask, patterning the first conductive material film to form a patterned first conductive material film, which is positioned in the first element region, etching away the exposed mask, forming a second conductive material having a work function different from that of the first conductive material film on the gate insulating film, and forming a first gate electrode having the first conductive material film and a second gate electrode made of the second conductive material film.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2003-327517, filed Sep. 19, 2003, the entire contents of which are incorporated herein by reference.BACKGROUND OF THE INVENTION[0002]1. Field of the Invention[0003]The present invention relates to a method of manufacturing a semiconductor device, particularly, to a method of manufacturing a semiconductor device comprising gate electrodes of differing work functions.[0004]2. Description of the Related Art[0005]In recent years, it is has become of highest importance to lower the resistance of the gate electrode in accordance with the development of a MOSFET device of the sub-micron order. It was customary in the past to use a polycrystalline silicon (polysilicon) doped with an impurity for forming the gate electrode. However, a depletion layer is generated at the interface between the gate electrode formed of a polycrystalline si...

Claims

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Application Information

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Patent Type & Authority Patents(United States)
IPC IPC(8): H01L21/70H01L21/8238H01L21/28H01L21/336H01L27/092H01L29/423H01L29/49
CPCH01L21/823842H01L29/66545H01L21/823857H01L29/517
Inventor SAITO, TOMOHIRO
Owner KIOXIA CORP