Integrated circuit and integrated circuit package

a technology of integrated circuits and integrated circuits, applied in the field of integrated circuits, can solve the problems of increasing circuit area and cost, and the need to limit the number of i/o terminals, and achieve the effect of eliminating the number of terminals and increasing the area

Inactive Publication Date: 2011-05-24
PANASONIC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

Enables monitoring of internal states without increasing the number of terminals, allowing for flexible selection of monitoring targets and preventing voltage drops by independent power supply to the debugging circuit, ensuring reliable and secure data transmission.

Problems solved by technology

An increase in the number of I / O terminals will cause disadvantages, such as an increase in circuit area and in cost.
Consequently, the number of I / O terminals needs to be limited.

Method used

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  • Integrated circuit and integrated circuit package
  • Integrated circuit and integrated circuit package
  • Integrated circuit and integrated circuit package

Examples

Experimental program
Comparison scheme
Effect test

embodiment 1

Overview

[0050]According to the present invention, an integrated circuit includes an integrated circuit portion and a debugging circuit portion fabricated into a single package. The integrated circuit portion includes functional blocks, such as a CPU and memory, connected to one another via a bus. The debugging circuit portion monitors the bus signals as well as the operation state of the functional blocks of the integrated circuit portion. The debugging circuit portion then transmits a user-selected signal to an external device by radio.

[0051]According to an embodiment 1 of the present invention, power is supplied to both the integrated circuit portion and the debugging circuit portion via a predetermined power supply terminal, which is not illustrated in the figures. As mentioned above, the integrated circuit portion includes functional blocks, such as a CPU and memory.

[0052]FIG. 1 is a functional block diagram of the integrated circuit according to the present invention. FIG. 1 al...

embodiment 2

[0085]According to the embodiment 1 described above, power is supplied to the debugging circuit portion 1100 as well as to the monitoring-target circuit portion 1200 via the predetermined power supply terminal. According to an embodiment 2 of the present invention, the monitoring-target circuit portion 1200 is supplied power via a predetermined power supply terminal but the debugging circuit portion 1100 is supplied power from an external device.

[0086]FIG. 3 is a functional block diagram of the integrated circuit 1000 according to the present embodiment.

[0087]According to the present embodiment, the monitoring-target circuit portion 1200 of the integrated circuit 1000 is supplied power via a power supply terminal 1400, whereas the debugging circuit portion 1100 is supplied power from the external device 2000 in a non-contact manner.

[0088]In addition, the setting unit 1120 sets the switch of the isolation unit 1300 to the close position, on condition that power is supplied from the e...

embodiment 3

[0105]According to the embodiments 1 and 2, in response to instruction information received from the external device 2000, the integrated circuit 1000 transmits monitoring information to the external device 2000 without authenticating whether the external device 2000 is an authorized transmission destination of monitoring information.

[0106]According to an embodiment 3 of the present invention, the integrated circuit 1000 determines whether the external device 2000 is an authorized transmission destination. Monitoring information is transmitted in encrypted form to the external device on condition that the external device 2000 is authenticated.

[0107]FIG. 5 is a functional block diagram of the integrated circuit 1000 according to the embodiment 3.

[0108]The following describes the difference in structure between the embodiments 1 and 2.

[0109]The setting unit 1120 includes an authentication unit 1121. In addition, the radio transmitter 1140 includes an encryption unit 1141.

[0110]The aut...

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PUM

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Abstract

An integrated circuit includes a monitoring-target circuit portion 1200 and a debugging circuit portion 1100. The debugging circuit portion 1100 acquires a signal on a signal line of the monitoring-target circuit portion 1200 and transmits the acquired signal to an external device 2000 by radio. The debugging circuit portion 1100 includes a setting unit 1120 and a radio transmitter 1140. In order to monitor the monitoring-target circuit portion 1200, the setting unit 1120 sets an isolation unit 1300 so as to make electrical connection between the debugging circuit portion 1100 and the monitoring-target circuit portion 1200. In addition, the setting unit 1120 sets a selector 1130 to select a signal line 1131 specified as a monitoring target. The radio transmitter 1140 acquires a signal on the signal line selected by the selector 1130 and transmits the acquired signal to the external device 2000 by radio.

Description

TECHNICAL FIELD[0001]The present invention relates an integrated circuit having a plurality of circuits interconnected by a bus. The present invention also relates to an integrated circuit package having the integrated circuit. More particularly, the present invention relates to a technique of monitoring the internal state of the integrated circuit.BACKGROUND ART[0002]With the recent advances in manufacturing of integrated circuits, it is now common that electronic products, such as mobile phones and home appliances, incorporate integrated circuit packages having high-performance CPUs and large-capacity memories.[0003]The size of an integrated circuit or package is determined by the number of input and output terminals for exchanging electronic signals between the integrated circuit and an external device. An increase in the number of I / O terminals will cause disadvantages, such as an increase in circuit area and in cost. Especially in the case of integrated circuits for incorporati...

Claims

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Application Information

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Patent Type & AuthorityPatents(United States)
IPC IPC(8): G01R31/02
CPCG01R31/31705
InventorISHII, MASAHIRONISHIO, TOSHIROH
OwnerPANASONIC CORP