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Electronic component mounting package

a technology for mounting packages and electronic components, applied in the field of wiring boards, can solve the problems of low rigidity of the overall package, limited ability to make the entire package thinner, and disadvantages of conventional coreless substrates, and achieve the effect of effective reducing warpage in the substrate and highly reliable mounting

Active Publication Date: 2012-03-27
SHINKO ELECTRIC IND CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present invention provides an electronic component mounting package that can effectively reduce warping in the substrate, which can occur during packaging or at other times. This is achieved by covering the entire surface of the structure (wiring board) with molding resin, exclusive of a predetermined portion (pad portion) where an external terminal is to be connected. This improves the rigidity of the overall substrate and prevents stress from propagating through the substrate, thus eliminating the disadvantage of chip delamination and enabling highly-reliable chip mounting of the electronic component. Additionally, the invention provides an electronic component mounting package where an interposer is mounted on the wiring board and connected to the pad portion, and the molding resin is partially filled into the gap between the structure and the interposer, which further reduces warping and enables high-density packaging.

Problems solved by technology

This leads to a limitation to making the entire package thinner.
On the other hand, the conventional coreless substrate has a disadvantage of being prone to “warpage” since the absence of the core substrate affords the overall package low rigidity.
This problem develops more markedly when a chip is mounted on the substrate.
However, this causes a shrinkage in the underfill resin and in turn leads to warpage in the periphery of the substrate toward the chip mounting surface, due to the fact that the coefficient of thermal expansion of the chip is different from that of the substrate.
Thus, in the structure of the conventional coreless substrate (semiconductor package), the low rigidity of the overall package causes a “warpage” during chip mounting, and this can possibly cause chip delamination, depending on the degree of warpage.
Accordingly, the structure has a problem in that reliable chip mounting is impossible with the structure.
Additionally, the timing of the warpage to occur in the substrate is not limited to only the time of chip mounting, but also the warpage may possibly occur even at stages before chip mounting.
For example, in the case where a coreless substrate is delivered and then a chip is mounted thereon, the warpage can possibly occur in the substrate, depending on how the substrate is handled during the processes from the delivery to the mounting, because the coreless substrate is intrinsically low in rigidity and flexible.
Moreover, this problem is not necessarily unique to the coreless substrate and may possibly likewise arise in a build-up multilayer wiring board having the core substrate.
As a result, the warpage may occur in the substrate.

Method used

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first embodiment

. . . See FIGS. 1 and 2

[0027]FIG. 1 shows, in a sectional form, the configuration of an electronic component mounting package according to a first embodiment of the present invention.

[0028]The electronic component mounting package 50 according to this embodiment basically includes: a wiring board (coreless substrate) 10 that does not contain a support base member; and an interposer 30 mounted on the coreless substrate 10. The package 50 according to this embodiment is provided with a chip (typically, a silicon (Si) chip) 1, such as a semiconductor device, mounted on the interposer 30 as shown by the dashed line in FIG. 1, with the interposer 30 mounted on the coreless substrate 10 as shown in FIG. 1. Thereby, the package 50 forms an electronic component device for a semiconductor device or the like.

[0029]As shown in FIG. 1, the coreless substrate 10 that constitutes a principal part of the package 50 has a structure in which a plurality of wiring layers 11, 13, 15, 17 and 19 are sta...

second embodiment

. . . See FIGS. 3 and 4

[0053]With the configurations of the electronic component mounting packages 50 and 50a according to the above-mentioned first embodiment and the modified example thereof (see FIGS. 1 and 2), description is given taking the case where the coreless substrates 10 and 10a are directly covered with the molding resins 25 and 25a, respectively, to thereby provide reinforcement to the substrates and thus reduce the warpage therein. Of course, however, the object to be covered with the molding resin is not necessarily limited to any one of the coreless substrates 10 and 10a, as is also apparent from the gist of the present invention. It is essential only that the covering with the molding resin permits an improvement in the rigidity of the overall package. Description is given below with respect to an embodiment in this case.

[0054]FIG. 3 shows, in sectional form, the configuration of an electronic component mounting package according to a second embodiment of the prese...

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Abstract

An electronic component mounting package includes a structure (coreless substrate) in which a plurality of wiring layers are stacked one on top of another with insulating layers interposed therebetween and are interconnected through via holes formed in the insulating layers. The entire surface of the coreless substrate, exclusive of pad portions defined at desired positions of the outermost wiring layers thereof, is covered with a molding resin. Further, an interposer is mounted on the side of the electronic component mounting surface of the coreless substrate, and the molding resin is partially filled into a gap between the coreless substrate and the interposer.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]This application is based on and claims priority of Japanese Patent Application No. 2007-314280 filed on Dec. 5, 2007, the entire contents of which are incorporated herein by reference.BACKGROUND OF THE INVENTION[0002](a) Field of the Invention[0003]The present invention relates to a wiring board for use in mounting an electronic component such as a semiconductor device. More particularly, the present invention relates to a wiring board (hereinafter referred to as an “electronic component mounting package” or merely as a “package”) adapted for mounting an electronic component using a thermosetting material, the wiring board having a structure of a multilayer wiring board in which a plurality of wiring layers are stacked one on top of another with an insulating layer interposed therebetween and are interconnected through via holes formed in the insulating layer.[0004](b) Description of the Related Art[0005]Conventionally, build-up process ...

Claims

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Application Information

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Patent Type & Authority Patents(United States)
IPC IPC(8): H05K1/16H01R12/50
CPCH01L21/6835H01L23/315H01L23/49822H01L23/49827H05K3/284H01L23/3128H01L2224/16235H01L23/49816H01L24/16H01L2221/68345H01L2924/0102H01L2924/01078H01L2924/01079H01L2924/09701H01L2924/15311H01L2924/19041H01L2924/19105H01L2924/3025H05K3/3436H05K2201/0989H05K2201/10378H05K2201/10734H05K2201/10977H01L2224/16225H01L2924/10253H01L2924/00
Inventor MIKI, SYOTAARAI, TADASHI
Owner SHINKO ELECTRIC IND CO LTD
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