Semiconductor device and manufacturing method for the same

Abstract

A semiconductor device and manufacturing method for the same are disclosed. The method includes providing a substrate that has an insulator layer and a semiconductor layer overlying the insulator layer. The method further includes forming a hard mask layer pattern on the semiconductor layer and etching the semiconductor layer using the patterned hard mask layer to form portions having different thickness in the semiconductor layer. The method also includes performing an oxygen-based treatment on the semiconductor layer to form a supporting oxide layer. A portion of the semiconductor layer is buried in the supporting oxide layer.

Description

CROSS-REFERENCES TO RELATED APPLICATIONS[0001]This application claims priority to Chinese Patent Application No. 201110266369.3, filed on Sep. 9, 2011 and entitled “Semiconductor Device and manufacturing method for the same”, which is incorporated herein in its entirety by reference.BACKGROUND OF THE INVENTION[0002]1. Field of the Invention[0003]This disclosure relates to semiconductor technology, and more particularly, to a semiconductor device and manufacturing method for the same.[0004]2. Description of the Related Art[0005]As semiconductor processing technology advances, the critical dimension (CD) of a semiconductor device continuously scales down. In such case, requirements for semiconductor manufacturing processes have become more stringent.[0006]Taking a fin field effect transistor (FinFET) as an example, as the CD of the semiconductor device scales down, it is almost impossible to form a desired dimension of the fin, e.g., a width of the fin, by patterning with lithography....

AI Technical Summary

Benefits of technology

The present invention provides an improved method of manufacturing a semiconductor device that can address the issue of continuously decreasing CD (critical dimension) and increase yield. Specifically, the method can prevent or reduce collapsing of the fin structure and unintentional removal of the fin structure, leading to improved yield of the semiconductor device.

Problems solved by technology

Taking a fin field effect transistor (FinFET) as an example, as the CD of the semiconductor device scales down, it is almost impossible to form a desired dimension of the fin, e.g., a width of the fin, by patterning with lithography.

However, in the prior art, how to prevent fin collapse / undesired remove during manufacturing becomes an importance problem, when the CD of fin continuously scales down.

As the thickness of the fin structure continuously decreases, the fin structure tends to collapse and / or be undesirably removed during subsequent manufacturing processes.

As a result, the yield of the semiconductor device may be adversely affected.

Likewise, as the thickness of the fin structure continuously decreases, the fin structure tends to collapse and / or be undesirably removed during subsequent manufacturing processes.

As a result, the yield of the semiconductor device may be adversely affected.

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