The invention discloses an implementation method of a high-performance atomic counter under a multi-core architecture, and belongs to the field of computer systems, the high-performance atomic counter comprises an Array and a core, and the Array comprises N atomic counters. An Array counter is arranged, each core is responsible for independently having an atomic counter, when access is needed, all counters of an array are accumulated, and an independent atomic counter variable is allocated to each CPU core in a
system, so that when a certain thread needs to update the count, only the counter of the CPU corresponding to the thread where the thread is located needs to be updated, and the count of the thread needs to be updated. Therefore, conflicts and
mutual exclusion among the threads are avoided, when the total value of the counter needs to be obtained, the counter values of all CPUs are accumulated, the process can be completed without locking, the reading efficiency is remarkably improved, the implementation mode of the invention not only reduces the frequency of
mutual exclusion operation, but also improves the reading efficiency. And the performance loss caused by a
memory barrier is reduced, and the performance of the atomic counter in a high-
concurrency scene is greatly improved.