Electronic circuit with test unit for testing interconnects

Abstract

A test arrangement for testing the interconnections of an electronic circuit ( 100 ) and a further electronic circuit is provided. A first selection of I / O nodes ( 120 ), which are arranged to receive input data in a functional mode of the electronic circuit ( 100 ), and which are coupled to a test unit in a test mode of the electronic circuit ( 100 ). The test unit has a combinatorial circuit ( 160 ) for implementing a multiple-input XOR or XNOR gate. The test unit also provides interconnections between the first selection of I / O nodes ( 120 ) and a second selection of I / O nodes ( 130 ) via logic gates ( 141-144 ). These interconnections increase the interconnect test coverage of the electronic device ( 100 ), because the interconnects with the further electronic circuits that are associated with I / O nodes ( 131-134 ) become testable as well.

Description

technical field [0001] The present invention relates to an electronic circuit comprising a plurality of input / output (I / O) nodes for connecting said electronic circuit to at least one other electronic circuit via an interconnect; In the test mode, the interconnection is tested, the test unit includes a combinational circuit with a plurality of inputs and an output, and the combinational circuit realizes a dedicated logic function; in the test mode, the I / O node logically connected with the test unit, wherein a first selection of I / O nodes is configured to carry corresponding input signals and to be connected to a plurality of inputs of a combinational circuit; and a second selection of I / O nodes includes the first node and a second selection of I / O nodes is configured to Two selections are configured to deliver respective output signals, and the first node is coupled to the output of the combinational circuit. Background technique [0002] Today, electronic devices typicall...

AI Technical Summary

Problems solved by technology

[0004] However, one disadvantage is that when the electronic circuit has multiple nodes configured to deliver corresponding output signals, only the interconnections of the nodes connected to the test cell output are tested

To make the remaining output nodes testable, additional combinational circuitry must be included, which introduces additional area dedicated to the electronics test configuration, thereby increasing the cost of the electronics

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