Data processing system having a Cartesian controller, and method for processing data

A technology for data processing systems and controllers, which is applied to general-purpose stored program computers, etc., and can solve problems such as large downtime

Inactive Publication Date: 2008-08-06
ALLSEARCH SEMI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] Yet known controlled processor systems inevitably suffer from inherently inefficient operations
On top of that, known control processor systems exhibit significant "downtime" when the controller not only has to issue instructions to those components connected in parallel, but also simultaneously executes basic routines within the controller itself. time"

Method used

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  • Data processing system having a Cartesian controller, and method for processing data
  • Data processing system having a Cartesian controller, and method for processing data

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Embodiment Construction

[0017] Figure 1 shows the connection between a Cartesian controller (CC) 100 and a data processing engine 102 (hereinafter referred to as the connection engine) and the active cell matrix supported therein, or processing element 104 (hereinafter referred to as the connection memory (CM)). structural relationship. The synchronous clock circuit 106 is used to coordinate the operation of CC100, CE102 and CM104, so that CC100 issues one of multiple instructions and transmits them to CE102 and CM104 for parallel execution and processing.

[0018] The clock circuit 106 can output a predetermined number of clock cycles per second, and the CC 100 can perform internal operations such that in a single clock cycle, the CC 100 performs one of multiple internal operations and simultaneously issues one of multiple instructions to the CE 102 . Cache memory 108 and RAM controller 110 are also shown.

[0019] Cache memories 108 constitute buffer pools, each preferably equal in size to CM 104 ...

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Abstract

A data-processing system includes a data device (104) for selectively storing data and an engine (element 102) having access to the memory device, the engine (element 102) supporting a plurality of machine executable programs. A controller (element 100) is utilized which selectively outputs one of a plurality of instructions to the engine (element 102) for driving the execution of the programs enabled by the engine, while a clock device (element 106) is utilized for outputting a synchronizing clock signal comprised of a predetermined number of clock cycles per second. The clock device outputs the synchronizing clock signal to the data device (104), the engine (element 102) and the controller (element 100). The controller outputs one of the instructions to the engine for execution of one of the programs, while also executing an operation within itself, all within a single clock cycle.

Description

[0001] Cross References to Related Applications [0002] This application claims priority to US Provisional Application Serial No. 60 / 431,154, filed December 5, 2002, entitled "ENHANCED VERSION OF CONNEX MEMORY," which is hereby incorporated by reference in its entirety. This application is related to U.S. Provisional Application entitled "A MEMORY ENGINE FOR THE INSPECTION ANDMANIPULATION OF DATA," filed August 10, 2001, under copending Serial No. 09 / 928,151, and filed on December 10, 2003 A US patent application entitled "CELLULAR ENGINE FOR A DATA PROCESSING SYSTEM," filed on the 4th, is hereby incorporated by reference in its entirety. technical field [0003] The present invention relates generally to a data processing system having a controller, and more particularly to a data processing system having a controller acting as a stack-oriented processor and, in one embodiment, capable of Drives the operation of the Connection Engine (CE) and thus the Connection Memory (CM)...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F15/76
Inventor 丹·托梅斯库格奥尔基·斯特凡
Owner ALLSEARCH SEMI
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