Bridging multi-chip packaging structure

Abstract

The present invention relates to a bridged type multi-chip package structure. It mainly includes a carrier plate, a first chip, a second chip and at least a conductive body. Said carrier plate has an upper surface and correspondent lower surface, several carrier plate contacts are positioned on upper surface of said carrier plate. The first chip has a first active surface, said first chip also has at least a first contact which is placed on first active surface of said first chip. Similarly, the second chip has a second active surface, said second active surface also has at least a second contact. Which is placed on second active surface of said second chip. The first side wall of first chip is adjacent to second side wall of second chip, and the first active surface of first chip and second active surface of second chip are placed on a common plane. The conductive body is extended on first active surface of first chip and second active surface of second chip so as to make first contact of first chip and second contact of second chip be electrically connected.

Description

technical field [0001] The invention relates to a multi-chip packaging structure, in particular to a bridge-type multi-chip packaging structure. Background technique [0002] In recent years, with the rapid development of electronic technology, high-tech electronic products have also come out one after another, so more humanized and functional electronic products are constantly being introduced. However, all kinds of products are designed towards the trend of light, thin, short and small. To provide more convenient and comfortable use. In the completion of an electronic product, electronic packaging plays an important role. There are generally two ways of electrical connection between chips. The first is wire-bonding, and the second is wire-bonding. Flip chip (flip chip) way. As far as the wire bonding method is concerned, it uses a wire bonding machine to move its wire bonding head to the contact point of the chip first, and uses tip discharge to melt the ends of the cond...

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Problems solved by technology

[0004] In the above-mentioned packaging structure, the first chip 12 is electrically connected to the second chip 14 through the wire 164. However, because the cross-sectional area of ​​the wire 164 is very small and the length is very long, the characteristic impedance matching is poor, so that the signal will be rapidly attenuated. , and when high-frequency circuits are operating, there will be inductance and capacitance parasitic effects (Parasitics), resulting in signal reflections

In addition, due to the very small area of ​​the transmission path between the wire 164 and the first chip contact, it is not conducive to the supply of voltage and current, resulting in poor power and grounding effects.

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