Oxide ridged waveguide structure between multilayer metals and method for making same

Abstract

A multi-layer metal oxides ridge waveguide structure, it contains: a silicon lining bottom; a oxide isolation layer on the lining and trap to isolate different electronic devices; A PSG phosphorus silicon oxide glass made on the isolation layer, the active region and trap; the first layer of metal produced in PSG phosphorus silicon glass, as the waveguide cladding; the first layer oxide layer produced in the first layer of metal; the second layer produced in the first layer of metal oxide layer; the second layer oxide production in the second layer of metal; the third layer of metal production in the second oxide layer; the third layer oxide production in the third layer of metal; the fourth layer of metal produced at the top level in the third oxide layer; The first layer of metal contact with the second layer of metal, the second layer of metal contact with the third layer of metal, the third and fourth layers of metal contacted as a restricted ridge waveguide horizontal layer, so that light is restricted within the ridge waveguide.

Description

technical field [0001] The invention relates to a silicon-based monolithic optoelectronic integration technology, in particular to a multilayer intermetallic oxide ridge waveguide structure and a manufacturing method thereof, which can be realized by completely standard CMOS technology. Background technique [0002] The integration level of integrated circuits is rapidly advancing at a rate of doubling every two years according to Moore's Law, and the simultaneous reduction in the size of transistors and interconnection lines makes the integration level of chips higher and higher. As the level of integration increases, the delay of individual transistors becomes smaller and smaller, while the delay of interconnect lines becomes larger and larger. This is because the reduction in the size of the interconnection wires increases the resistance of the interconnection wires. Although the use of copper interconnections instead of the previous aluminum interconnections can reduce t...

AI Technical Summary

Problems solved by technology

The ridge waveguide structure using SOI as the substrate cannot be realized by standard CMOS process, so it is impossible to integrate light source, waveguide and detector on a silicon-based monolithic chip on the standard CMOS process line

Images