Protocol independent transmission using a 10 gigabit attachment unit interface

A protocol-independent, interface-based technology, applied in transmission systems, digital transmission systems, secure communication devices, etc.

Inactive Publication Date: 2010-01-20
INTEL CORP
View PDF2 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] However, to date, the XAUI bus has never been implemented in a device in a way that can suppo

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Protocol independent transmission using a 10 gigabit attachment unit interface
  • Protocol independent transmission using a 10 gigabit attachment unit interface
  • Protocol independent transmission using a 10 gigabit attachment unit interface

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0022] The 10GbE proposal presented in the IEEE draft P802.3ae specification defines a 10 Gigabit / s Media Independent Interface (XGMII) parallel bus architecture consisting of 74 signals (including two 32-bit data paths, one of which is in the transmit direction , the other in the receive direction; four control signals; and a clock signal). XGMII couples the Ethernet media access control (MAC) layer components (the MAC layer corresponds to the second layer of the International Standards Organization's Open Interconnection System (OSI), that is, the data link layer protocol) to the Ethernet physical (PHY) layer device (PHY layer corresponds to OSI Layer 1, which is part of the physical layer protocol).

[0023] The 10GbE specification also proposes optional XGMII extensions, consisting of two 10 Gigabit Media Independent Interface (XGMII) Extender Sublayers (XGXS) and an XAUI bus between them (“Optional XGMII Extender”; or simply "XGMII Extender") for extending XGMII up to, f...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

Transmitting data across a scalable, flexible speed, serial bus in a communication protocol independent manner.

Description

technical field [0001] Embodiments of the present invention relate to an apparatus and method for transmitting data in a protocol-independent manner over an IEEE P802.3ae 10 Gigabit Accessory Unit (XAUI) bus. Background technique [0002] A communication bus for coupling between high-performance devices, such as between integrated circuits ("chip-to-chip" communication), between input / output (I / O) devices, or between printed circuit boards via connectors Interconnected communication buses that may need to operate at very high transfer speeds. Also, the interface logic and pin count used to implement the bus may need to be minimized to reduce the cost and complexity of devices within or between the bus. In general, parallel buses cannot meet the needs of many current applications because the data transfer speed of the bus is limited in operation to relatively slow speeds of one billion bits per second, or fewer bits per parallel signal. While simple serial signals are gener...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): H04L12/40H04L12/413H04M11/06H04L12/46
CPCH04L12/413H04M11/06H04L12/46H04L12/40032H04L9/40
Inventor 理查德·塔博尔克唐纳德·奥尔德鲁史蒂夫·德雷尔加里·拉拉
Owner INTEL CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap