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Semiconductor packaging structure and method for making the same

A technology for semiconductors and manufacturing methods, applied in the field of semiconductor packaging structures and manufacturing methods, can solve problems such as reducing product circuit layout and reliability, increasing manufacturing process equipment cost and complexity, etc., to improve circuit layout and reliability, The effect of improving accuracy and success rate

Inactive Publication Date: 2008-01-02
SILICONWARE PRECISION IND CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, this manufacturing method still requires drilling holes in the substrate, which reduces the circuit layout and reliability of the product, and requires the use of a mold with a positioning hosel, which increases the cost and complexity of the manufacturing process equipment

Method used

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  • Semiconductor packaging structure and method for making the same
  • Semiconductor packaging structure and method for making the same
  • Semiconductor packaging structure and method for making the same

Examples

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no. 1 example

[0062] Referring to FIGS. 4A to 4H , they are schematic diagrams of a first embodiment of the semiconductor assembly structure and its manufacturing method of the present invention.

[0063] As shown in Figures 4A and 4B, a substrate 41 is provided, and the substrate 41 is provided with an identification point 411, and the identification point 411 can be a dot, which can be formed on the substrate 41 by electroplating a metal layer, preferably in the form of The identification point is formed by electroplating gold. In addition, a semiconductor chip 42 is mounted on the substrate 41 , and the semiconductor chip 42 is electrically connected to the substrate 41 by gold wires 43 . In addition, the semiconductor chip 42 can also be mounted in a flip-chip manner and electrically connected to the substrate 41 .

[0064] As shown in Figures 4C and 4D, a heat sink 44 is provided at the same time, the heat sink 44 includes a flat portion 442, and a support portion 441 integrally conne...

no. 2 example

[0068] Referring to FIG. 5 , it is a schematic diagram of a second embodiment of the present invention.

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Abstract

The invention relates to a semi-conductor package structure and a relative production, comprising that providing a baseboard and a heat radiator with opening holes, while the baseboard is provided with recognize points, therefore, the recognize points can be checked via the opening holes on the heat radiator via a checking system, to position the heat radiator on the baseboard via adhesive. The invention can avoid presetting positioning holes on baseboard to avoid instable circuit distribution. The invention can detect the deflection of heat radiator real-time.

Description

technical field [0001] The present invention relates to a semiconductor assembly structure and its manufacturing method, in particular to a semiconductor assembly structure with integrated heat sink and its manufacturing method. Background technique [0002] As the density of electronic circuits (Electronic Circuits) and electronic components (Electronic Components) in semiconductor chips increases, higher heat will be generated during operation, and because in semiconductor packages, the encapsulant that covers semiconductor chips is thermally conductive Poor resin composition, resulting in the heat generated during operation cannot be efficiently dissipated, which affects the performance of semiconductor chips. [0003] In order to improve the heat dissipation efficiency of the semiconductor package, the industry has developed a device that adds a heat sink to the semiconductor package, as disclosed in US Patent No. 6,552,428, so as to dissipate the heat of the semiconduct...

Claims

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Application Information

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IPC IPC(8): H01L21/50H01L23/367
CPCH01L2224/48091H01L2224/49175H01L2924/00014
Inventor 曾文聪蔡芳霖蔡和易萧承旭黄致明
Owner SILICONWARE PRECISION IND CO LTD
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