High-speed residual path management module of Viterbi decoder

A technology of Viterbi decoder and management module, applied in the field of high-speed Viterbi decoder survival path management module, can solve the problems of decoding speed limitation, large decoding delay, etc., so as to reduce output interval and reduce decoding delay. , the effect of increasing data processing capacity

Inactive Publication Date: 2008-03-19
EAST CHINA NORMAL UNIV
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  • Summary
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AI Technical Summary

Problems solved by technology

However, the survival path management module of the traditional Viterbi decoder needs to read and write the memory module frequently, and there is a large decoding delay, which limits the decoding speed.

Method used

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  • High-speed residual path management module of Viterbi decoder
  • High-speed residual path management module of Viterbi decoder

Examples

Experimental program
Comparison scheme
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Embodiment

[0018] Viterbi decoder of embodiment (2,1,7)

[0019] This embodiment adopts the hardware structure of the structural block diagrams shown in FIGS. 2 , 3 and 4 to implement the Viterbi decoding process. Clock is an external input clock. When receiving the judgment bit Data_in sent by the previous stage, the control module controls two 64*6 register groups 11 and 12 to exchange. The exchange direction is determined by the output control module 2. Each exchange After 6 times, the result is sent to the register latch 23 for preservation, and at the same time, the two register groups 11 and 12 are reset, and a new exchange is restarted. When the amount of processed data exceeds the decoding depth, the output control module 2 samples the InitState signal to obtain the address of the read register latch 23 . Read the data in the register latch 23 sequentially by this method, until the data stored at first is read, it can be used for buffering and outputting.

[0020] This embodime...

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Abstract

The invention relates to a survivor path management module in a high speed Viterbi decoder, belonging to the field of integrated circuit design and the digital signal processing technology. The invention comprises two modules: a register exchange reader module and an output control module. Based on HTF architecture with the length of each block fixed, the decoding depth X is divided into a plurality of blocks and each is of 6-bit in length. After the each operation of HTF, the data existing in the register is of the state point of the first 6 time of the survivor path passing through the present state. When being output, the correct initial register is traced and output. The process saves the back-track process of each block, and the judging process of the access and the memory module of the bit. The invention has the advantages of enhancing the decoding speed, reducing the decoding delay and output interval and increasing the data-processing capacity of the system.

Description

technical field [0001] The invention relates to a high-speed Viterbi (Viterbi) decoder survival path management module, which belongs to the technical field of integrated circuit design and digital signal processing. Background technique [0002] Error-correcting codes and error-control technologies are playing an increasingly important role in our lives, among which convolutional codes are widely used due to their excellent error-correcting performance, such as in W-CDMA, DVB-S, DVB- Convolutional coding is used in T and IEEE802.11 systems. The Viterbi decoding algorithm is a probabilistic decoding algorithm for convolutional codes, and the decoding output can be obtained by finding the final surviving path on the encoder trellis graph. Therefore, for high-speed systems, a decoder with high speed and low decoding delay is very necessary. The traditional Viterbi decoder survival path management module consists of three sub-modules: register exchange read-write module, outp...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M13/23H03M13/41
Inventor 陈亦灏李小进赖宗声沈怿皓李萌
Owner EAST CHINA NORMAL UNIV
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