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Frequency-reduction sampling device with multi-channel audio and frequency-reduction sampling method

A multi-channel, sampler technology, applied in the direction of image communication, color TV parts, TV system parts, etc., can solve the problem of inconsistent delay time and achieve the effect of saving power consumption

Inactive Publication Date: 2008-04-02
HIMAX TECH LTD
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  • Claims
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Problems solved by technology

But in fact, the time required for the demodulation of the stereo difference in-phase (L-R_I) signal 113c and the stereo difference quadrature (L-R_Q) signal 113d through the frequency discriminator 141 is not exactly equal to 20 microseconds, so causing inconsistencies in delay time when separating said left mono signal and right mono signal

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  • Frequency-reduction sampling device with multi-channel audio and frequency-reduction sampling method
  • Frequency-reduction sampling device with multi-channel audio and frequency-reduction sampling method
  • Frequency-reduction sampling device with multi-channel audio and frequency-reduction sampling method

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[0029] FIG. 2 is a schematic block diagram of a memory-based down-sampler 20 according to a first embodiment of the present invention. The input signal of the down-sampler 20 is except that the mono signal 201 is originally a baseband signal, the stereo difference signal 203, the second audio program in-phase (SAP_I) signal 204a, and the second audio program quadrature (SAP_Q) signal 204b are all It is a signal that has been mixed and down-converted by a frequency mixer to be a signal mainly based on the baseband signal, but there are still some high-frequency signals derived from the mixing and down-frequency processing.

[0030] What is different from the conventional is that the four input signals are processed by a single down-sampler 20 for down-sampling digital signal processing, rather than the four down-samplers shown in FIG. 1(b) processing four inputs respectively Signal.

[0031] The down-sampler 20 includes a random access memory (RAM) 210, a random access memory ...

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Abstract

The present invention is a frequency-reducing sampler with memory as basic structure, for processing multi-channel audio. The frequency-reducing sampler comprises a memory, a controller and a processing calculation unit. The processing calculation unit is used to implement frequency-reducing sampling to each input audio component of the multi-channel audio so as to generate corresponding multi-channel calculation data. The controller controls the access to the memory of each audio component of the multi-channel audio and multi-channel calculation data, to ensure the memory cooperate the processing calculation unit to complete digital signal processing of frequency-reducing sampling. The input of the multichannel audio and the output of the multichannel calculation data are processed by time-sharing mode. Compared with the traditional frequency-reducing sampler circuit, the present invention reduces the cost as well as power consumption of hardware circuit.

Description

technical field [0001] The present invention relates to a down-sampling device (decimator) and down-sampling method applied to digital signal processing (digital signal processing; DSP), in particular to a down-sampling method applied to multi-channel (multi-channel) audio processing device and downsampling method. Background technique [0002] FIG. 1( a ) shows a frequency spectrum distribution diagram of television multi-track stereo (MTS) audio formulated by the broadcast television systems committee (BTSC) in the United States. Television multi-channel stereo (MTS) audio 10 is a composite (composite) signal, which includes: a monophonic (L+R) signal 101, an indicator (pilot) signal 102, a stereo difference (L-R) signal 103 , a second audio program (second audioprogram; SAP) signal 104 , and a professional channel (professional channel) signal 105 . [0003] The monophonic (L+R) signal 101 is a baseband (base band) signal with a bandwidth of about 15KHz; the frequency F...

Claims

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Application Information

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IPC IPC(8): H04N5/60
Inventor 蔡典儒黄昭维
Owner HIMAX TECH LTD
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