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Inter-connecting structure between multi-layer base board and producing method

A multi-layer substrate and substrate technology, which is applied in the structural connection of printed circuits, semiconductor/solid-state device manufacturing, printed circuit components, etc., can solve problems such as limited rigid system packaging concepts, and achieve the effect of improving packaging density

Inactive Publication Date: 2008-07-02
PRINCO CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, basically the packaging technology is still limited to the hard system packaging concept

Method used

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  • Inter-connecting structure between multi-layer base board and producing method
  • Inter-connecting structure between multi-layer base board and producing method
  • Inter-connecting structure between multi-layer base board and producing method

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Embodiment Construction

[0025] Relevant detailed description and technical contents of the present invention are as follows now in conjunction with the accompanying drawings:

[0026] Please refer to FIG. 1 , which is a cross-sectional view of an interconnection structure between multilayer substrates according to an embodiment of the present invention. The interconnection structure between multilayer substrates at least includes a first multilayer substrate 300 , a second multilayer substrate 400 and a plurality of via holes 1 , 2 and 3 formed on the first multilayer substrate 300 . The first outer surface of the first multilayer substrate 300 is connected to a first chip component 100 , and the first outer surface of the second multilayer substrate 400 is connected to a second chip component 200 . The first chip component 100 and the second chip component 200 may be any type of chip components such as logic components, memory components, analog components, optoelectronic components, micro-electrome...

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Abstract

The invention relates to a structure interconnected between multi-layered base plates and a manufacturing method thereof. The structure comprises a first multi-layered base plate and a second multi-layered base plate. The first multi-layered base plate is provided with a first metal layer, a first dielectric layer and an interlayer hole; wherein, one end edge of the first metal layer is connected with the corresponding end edge of the first dielectric layer and separated from the end edges of other neighboring first metal layer and the first dielectric layer. The second multi-layered base plate is provided with a second metal layer and a second dielectric layer; wherein, one end edge of the second metal layer is connected with the corresponding end edge of the second dielectric layer and separated from the end edges of other neighboring second metal layer and the second dielectric layer. The interlayer hole is positioned at the end edge of the first dielectric layer of the first multi-layered base plate. The interlayer hole is internally provided with a conducting part. The conducting part of the first metal layer is mutually felted with the second metal layer of the second multi-layered base plate.

Description

technical field [0001] The present invention relates to a structure and manufacturing method for interconnection between multilayer substrates, in particular to a structure and manufacturing method for interconnection between multilayer substrates of any type, which can be applied to various types of chip components. Background technique [0002] Nowadays, any type of electronic product is becoming increasingly miniaturized. With the continuous reduction of the size of the semiconductor wafer process, the related technologies of the back-end packaging must also develop in the direction of miniaturization. Therefore, the integration level of today's I.C. integrated circuits has been greatly increased, and it is inevitable to use multi-layer substrates to package different types of components and integrate various functions into a high-performance system. For example, an integrated system with a basic architecture may include various chip components (such as logic components, ...

Claims

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Application Information

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IPC IPC(8): H05K1/14H05K3/36H01R12/00H01L23/00H01L21/00
Inventor 杨之光
Owner PRINCO CORP
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